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From: Alistair Francis <alistair23@gmail.com>
To: Meng Zhuo <mengzhuo@iscas.ac.cn>
Cc: qemu-devel@nongnu.org, Andrew Jones <ajones@ventanamicro.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	 Weiwei Li <liwei1518@gmail.com>,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	 Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	 "open list:RISC-V TCG CPUs" <qemu-riscv@nongnu.org>
Subject: Re: [PATCH v6] target/riscv/kvm: add max_satp_mode from host cpu
Date: Mon, 9 Jun 2025 12:40:39 +1000	[thread overview]
Message-ID: <CAKmqyKOxXVQ7WGudSAbwn5jUaGObw4FnLSELTQMGLJhetxB=VQ@mail.gmail.com> (raw)
In-Reply-To: <20250606034250.181707-1-mengzhuo@iscas.ac.cn>

On Fri, Jun 6, 2025 at 1:45 PM Meng Zhuo <mengzhuo@iscas.ac.cn> wrote:
>
> This patch adds max_satp_mode from host kvm cpu setting.
>
> Tested on: Milkv Megrez (Eswin 7700x)
>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2931
> Signed-off-by: Meng Zhuo <mengzhuo@iscas.ac.cn>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
> Change in v6:
> - Rebase on https://github.com/alistair23/qemu/tree/riscv-to-apply.next
> - Minor change in title
>
> Change in v5:
> - Adds R-B comment from Andrew Jones
>
> Change in v4:
> - Adds changelog in commit message
> - Link to v3: https://lists.nongnu.org/archive/html/qemu-devel/2025-05/msg04629.html
>
> Change in v3:
> - Rebase on https://github.com/alistair23/qemu/tree/riscv-to-apply.next
>   as requested
> - Link to v2: https://lists.nongnu.org/archive/html/qemu-devel/2025-04/msg05203.html
>
> Changes in v2:
> - use set_satp_mode_max_supported instead of hard code
> - Link to v1: https://lists.nongnu.org/archive/html/qemu-devel/2025-04/msg05094.html
> ---
>  target/riscv/kvm/kvm-cpu.c | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index e1a04be20f..502d33f404 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -999,6 +999,19 @@ static void kvm_riscv_destroy_scratch_vcpu(KVMScratchCPU *scratch)
>      close(scratch->kvmfd);
>  }
>
> +static void kvm_riscv_init_max_satp_mode(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
> +{
> +    struct kvm_one_reg reg;
> +    int ret;
> +
> +    reg.id = RISCV_CONFIG_REG(satp_mode);
> +    reg.addr = (uint64_t)&cpu->cfg.max_satp_mode;
> +    ret = ioctl(kvmcpu->cpufd, KVM_GET_ONE_REG, &reg);
> +    if (ret != 0) {
> +        error_report("Unable to retrieve satp mode from host, error %d", ret);
> +    }
> +}
> +
>  static void kvm_riscv_init_machine_ids(RISCVCPU *cpu, KVMScratchCPU *kvmcpu)
>  {
>      struct kvm_one_reg reg;
> @@ -1302,6 +1315,7 @@ static void riscv_init_kvm_registers(Object *cpu_obj)
>      kvm_riscv_init_machine_ids(cpu, &kvmcpu);
>      kvm_riscv_init_misa_ext_mask(cpu, &kvmcpu);
>      kvm_riscv_init_cfg(cpu, &kvmcpu);
> +    kvm_riscv_init_max_satp_mode(cpu, &kvmcpu);
>
>      kvm_riscv_destroy_scratch_vcpu(&kvmcpu);
>  }
> @@ -1985,7 +1999,7 @@ static bool kvm_cpu_realize(CPUState *cs, Error **errp)
>          }
>      }
>
> -   return true;
> +    return true;
>  }
>
>  void riscv_kvm_cpu_finalize_features(RISCVCPU *cpu, Error **errp)
> --
> 2.39.5
>
>


      reply	other threads:[~2025-06-09  2:42 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-06  3:42 [PATCH v6] target/riscv/kvm: add max_satp_mode from host cpu Meng Zhuo
2025-06-09  2:40 ` Alistair Francis [this message]

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