* [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton @ 2022-07-23 9:03 Atish Patra 2022-07-25 1:14 ` Alistair Francis 2022-07-27 12:23 ` Alistair Francis 0 siblings, 2 replies; 6+ messages in thread From: Atish Patra @ 2022-07-23 9:03 UTC (permalink / raw) To: qemu-devel Cc: Atish Patra, Alistair Francis, Bin Meng, Palmer Dabbelt, qemu-riscv Since commit 40244040a7ac, multi-socket configuration with plic is broken as the hartid for second socket is calculated incorrectly. The hartid stored in addr_config already includes the offset for the base hartid for that socket. Adding it again would lead to segfault while creating the plic device for the virt machine. qdev_connect_gpio_out was also invoked with incorrect number of gpio lines. Fixes: 40244040a7ac (hw/intc: sifive_plic: Avoid overflowing the addr_config buffer) Signed-off-by: Atish Patra <atishp@rivosinc.com> --- hw/intc/sifive_plic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c index 56d60e9ac935..fdac028a521f 100644 --- a/hw/intc/sifive_plic.c +++ b/hw/intc/sifive_plic.c @@ -454,10 +454,10 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, for (i = 0; i < plic->num_addrs; i++) { int cpu_num = plic->addr_config[i].hartid; - CPUState *cpu = qemu_get_cpu(hartid_base + cpu_num); + CPUState *cpu = qemu_get_cpu(cpu_num); if (plic->addr_config[i].mode == PLICMode_M) { - qdev_connect_gpio_out(dev, num_harts + cpu_num, + qdev_connect_gpio_out(dev, cpu_num, qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); } if (plic->addr_config[i].mode == PLICMode_S) { -- 2.25.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton 2022-07-23 9:03 [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton Atish Patra @ 2022-07-25 1:14 ` Alistair Francis 2022-07-25 22:30 ` Atish Kumar Patra 2022-07-27 12:23 ` Alistair Francis 1 sibling, 1 reply; 6+ messages in thread From: Alistair Francis @ 2022-07-25 1:14 UTC (permalink / raw) To: Atish Patra Cc: qemu-devel@nongnu.org Developers, Alistair Francis, Bin Meng, Palmer Dabbelt, open list:RISC-V On Sat, Jul 23, 2022 at 7:22 PM Atish Patra <atishp@rivosinc.com> wrote: > > Since commit 40244040a7ac, multi-socket configuration with plic is > broken as the hartid for second socket is calculated incorrectly. > The hartid stored in addr_config already includes the offset > for the base hartid for that socket. Adding it again would lead > to segfault while creating the plic device for the virt machine. > qdev_connect_gpio_out was also invoked with incorrect number of gpio > lines. > > Fixes: 40244040a7ac (hw/intc: sifive_plic: Avoid overflowing the addr_config buffer) > > Signed-off-by: Atish Patra <atishp@rivosinc.com> Can you share the -cpu options that causes the segfault? I'll add it to my test case Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/intc/sifive_plic.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > index 56d60e9ac935..fdac028a521f 100644 > --- a/hw/intc/sifive_plic.c > +++ b/hw/intc/sifive_plic.c > @@ -454,10 +454,10 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, > > for (i = 0; i < plic->num_addrs; i++) { > int cpu_num = plic->addr_config[i].hartid; > - CPUState *cpu = qemu_get_cpu(hartid_base + cpu_num); > + CPUState *cpu = qemu_get_cpu(cpu_num); > > if (plic->addr_config[i].mode == PLICMode_M) { > - qdev_connect_gpio_out(dev, num_harts + cpu_num, > + qdev_connect_gpio_out(dev, cpu_num, > qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); > } > if (plic->addr_config[i].mode == PLICMode_S) { > -- > 2.25.1 > > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton 2022-07-25 1:14 ` Alistair Francis @ 2022-07-25 22:30 ` Atish Kumar Patra 2022-07-27 7:38 ` Alistair Francis 0 siblings, 1 reply; 6+ messages in thread From: Atish Kumar Patra @ 2022-07-25 22:30 UTC (permalink / raw) To: Alistair Francis Cc: qemu-devel@nongnu.org Developers, Alistair Francis, Bin Meng, Palmer Dabbelt, open list:RISC-V [-- Attachment #1: Type: text/plain, Size: 2159 bytes --] On Sun, Jul 24, 2022 at 6:14 PM Alistair Francis <alistair23@gmail.com> wrote: > On Sat, Jul 23, 2022 at 7:22 PM Atish Patra <atishp@rivosinc.com> wrote: > > > > Since commit 40244040a7ac, multi-socket configuration with plic is > > broken as the hartid for second socket is calculated incorrectly. > > The hartid stored in addr_config already includes the offset > > for the base hartid for that socket. Adding it again would lead > > to segfault while creating the plic device for the virt machine. > > qdev_connect_gpio_out was also invoked with incorrect number of gpio > > lines. > > > > Fixes: 40244040a7ac (hw/intc: sifive_plic: Avoid overflowing the > addr_config buffer) > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > Can you share the -cpu options that causes the segfault? I'll add it > to my test case > > "-cpu rv64 -M virt -m 2G -smp 4 -object memory-backend-ram,size=1G,policy=bind,host-nodes=0,id=ram-node0 \ -numa node,memdev=ram-node0 \ -object memory-backend-ram,size=1G,policy=bind,host-nodes=0,id=ram-node1 \ -numa node,memdev=ram-node1" You also need to enable CONFIG_NUMA in kernel. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> > > Alistair > > > --- > > hw/intc/sifive_plic.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > > index 56d60e9ac935..fdac028a521f 100644 > > --- a/hw/intc/sifive_plic.c > > +++ b/hw/intc/sifive_plic.c > > @@ -454,10 +454,10 @@ DeviceState *sifive_plic_create(hwaddr addr, char > *hart_config, > > > > for (i = 0; i < plic->num_addrs; i++) { > > int cpu_num = plic->addr_config[i].hartid; > > - CPUState *cpu = qemu_get_cpu(hartid_base + cpu_num); > > + CPUState *cpu = qemu_get_cpu(cpu_num); > > > > if (plic->addr_config[i].mode == PLICMode_M) { > > - qdev_connect_gpio_out(dev, num_harts + cpu_num, > > + qdev_connect_gpio_out(dev, cpu_num, > > qdev_get_gpio_in(DEVICE(cpu), > IRQ_M_EXT)); > > } > > if (plic->addr_config[i].mode == PLICMode_S) { > > -- > > 2.25.1 > > > > > [-- Attachment #2: Type: text/html, Size: 3290 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton 2022-07-25 22:30 ` Atish Kumar Patra @ 2022-07-27 7:38 ` Alistair Francis 0 siblings, 0 replies; 6+ messages in thread From: Alistair Francis @ 2022-07-27 7:38 UTC (permalink / raw) To: Atish Kumar Patra Cc: qemu-devel@nongnu.org Developers, Alistair Francis, Bin Meng, Palmer Dabbelt, open list:RISC-V On Tue, Jul 26, 2022 at 8:30 AM Atish Kumar Patra <atishp@rivosinc.com> wrote: > > > > > On Sun, Jul 24, 2022 at 6:14 PM Alistair Francis <alistair23@gmail.com> wrote: >> >> On Sat, Jul 23, 2022 at 7:22 PM Atish Patra <atishp@rivosinc.com> wrote: >> > >> > Since commit 40244040a7ac, multi-socket configuration with plic is >> > broken as the hartid for second socket is calculated incorrectly. >> > The hartid stored in addr_config already includes the offset >> > for the base hartid for that socket. Adding it again would lead >> > to segfault while creating the plic device for the virt machine. >> > qdev_connect_gpio_out was also invoked with incorrect number of gpio >> > lines. >> > >> > Fixes: 40244040a7ac (hw/intc: sifive_plic: Avoid overflowing the addr_config buffer) >> > >> > Signed-off-by: Atish Patra <atishp@rivosinc.com> >> >> Can you share the -cpu options that causes the segfault? I'll add it >> to my test case >> > > "-cpu rv64 -M virt -m 2G -smp 4 -object memory-backend-ram,size=1G,policy=bind,host-nodes=0,id=ram-node0 \ > -numa node,memdev=ram-node0 \ > -object memory-backend-ram,size=1G,policy=bind,host-nodes=0,id=ram-node1 \ > -numa node,memdev=ram-node1" > > You also need to enable CONFIG_NUMA in kernel. Thanks! Applied to riscv-to-apply.next Alistair ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton 2022-07-23 9:03 [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton Atish Patra 2022-07-25 1:14 ` Alistair Francis @ 2022-07-27 12:23 ` Alistair Francis 2022-07-27 19:01 ` Atish Kumar Patra 1 sibling, 1 reply; 6+ messages in thread From: Alistair Francis @ 2022-07-27 12:23 UTC (permalink / raw) To: Atish Patra Cc: qemu-devel@nongnu.org Developers, Alistair Francis, Bin Meng, Palmer Dabbelt, open list:RISC-V On Sat, Jul 23, 2022 at 7:22 PM Atish Patra <atishp@rivosinc.com> wrote: > > Since commit 40244040a7ac, multi-socket configuration with plic is > broken as the hartid for second socket is calculated incorrectly. > The hartid stored in addr_config already includes the offset > for the base hartid for that socket. Adding it again would lead > to segfault while creating the plic device for the virt machine. > qdev_connect_gpio_out was also invoked with incorrect number of gpio > lines. > > Fixes: 40244040a7ac (hw/intc: sifive_plic: Avoid overflowing the addr_config buffer) > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > --- > hw/intc/sifive_plic.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > index 56d60e9ac935..fdac028a521f 100644 > --- a/hw/intc/sifive_plic.c > +++ b/hw/intc/sifive_plic.c > @@ -454,10 +454,10 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, > > for (i = 0; i < plic->num_addrs; i++) { > int cpu_num = plic->addr_config[i].hartid; > - CPUState *cpu = qemu_get_cpu(hartid_base + cpu_num); > + CPUState *cpu = qemu_get_cpu(cpu_num); > > if (plic->addr_config[i].mode == PLICMode_M) { > - qdev_connect_gpio_out(dev, num_harts + cpu_num, > + qdev_connect_gpio_out(dev, cpu_num, Argh! I was trying to get this ready to go into 7.1. I have been working on updating my tests to catch this failure in the future as well. While testing this change I noticed that it breaks the noMMU test case. I think the correct fix is actually this (on top of your patch): diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c index fdac028a52..af4ae3630e 100644 --- a/hw/intc/sifive_plic.c +++ b/hw/intc/sifive_plic.c @@ -457,7 +457,7 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, CPUState *cpu = qemu_get_cpu(cpu_num); if (plic->addr_config[i].mode == PLICMode_M) { - qdev_connect_gpio_out(dev, cpu_num, + qdev_connect_gpio_out(dev, num_harts - plic->hartid_base + cpu_num, qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); } if (plic->addr_config[i].mode == PLICMode_S) { The idea is that we need to increment the second argument to qdev_connect_gpio_out() for the PLICMode_M compared to the PLICMode_S case. This ensures that we do that correctly without breaking anything. How does that look to you? Alistair > qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT)); > } > if (plic->addr_config[i].mode == PLICMode_S) { > -- > 2.25.1 > > ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton 2022-07-27 12:23 ` Alistair Francis @ 2022-07-27 19:01 ` Atish Kumar Patra 0 siblings, 0 replies; 6+ messages in thread From: Atish Kumar Patra @ 2022-07-27 19:01 UTC (permalink / raw) To: Alistair Francis Cc: qemu-devel@nongnu.org Developers, Alistair Francis, Bin Meng, Palmer Dabbelt, open list:RISC-V [-- Attachment #1: Type: text/plain, Size: 2978 bytes --] On Wed, Jul 27, 2022 at 5:23 AM Alistair Francis <alistair23@gmail.com> wrote: > On Sat, Jul 23, 2022 at 7:22 PM Atish Patra <atishp@rivosinc.com> wrote: > > > > Since commit 40244040a7ac, multi-socket configuration with plic is > > broken as the hartid for second socket is calculated incorrectly. > > The hartid stored in addr_config already includes the offset > > for the base hartid for that socket. Adding it again would lead > > to segfault while creating the plic device for the virt machine. > > qdev_connect_gpio_out was also invoked with incorrect number of gpio > > lines. > > > > Fixes: 40244040a7ac (hw/intc: sifive_plic: Avoid overflowing the > addr_config buffer) > > > > Signed-off-by: Atish Patra <atishp@rivosinc.com> > > --- > > hw/intc/sifive_plic.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > > index 56d60e9ac935..fdac028a521f 100644 > > --- a/hw/intc/sifive_plic.c > > +++ b/hw/intc/sifive_plic.c > > @@ -454,10 +454,10 @@ DeviceState *sifive_plic_create(hwaddr addr, char > *hart_config, > > > > for (i = 0; i < plic->num_addrs; i++) { > > int cpu_num = plic->addr_config[i].hartid; > > - CPUState *cpu = qemu_get_cpu(hartid_base + cpu_num); > > + CPUState *cpu = qemu_get_cpu(cpu_num); > > > > if (plic->addr_config[i].mode == PLICMode_M) { > > - qdev_connect_gpio_out(dev, num_harts + cpu_num, > > + qdev_connect_gpio_out(dev, cpu_num, > > Argh! > > I was trying to get this ready to go into 7.1. I have been working on > updating my tests to catch this failure in the future as well. > > While testing this change I noticed that it breaks the noMMU test case. > > I think the correct fix is actually this (on top of your patch): > > diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c > index fdac028a52..af4ae3630e 100644 > --- a/hw/intc/sifive_plic.c > +++ b/hw/intc/sifive_plic.c > @@ -457,7 +457,7 @@ DeviceState *sifive_plic_create(hwaddr addr, char > *hart_config, > CPUState *cpu = qemu_get_cpu(cpu_num); > > if (plic->addr_config[i].mode == PLICMode_M) { > - qdev_connect_gpio_out(dev, cpu_num, > + qdev_connect_gpio_out(dev, num_harts - plic->hartid_base + > cpu_num, > qdev_get_gpio_in(DEVICE(cpu), > IRQ_M_EXT)); > } > if (plic->addr_config[i].mode == PLICMode_S) { > > The idea is that we need to increment the second argument to > qdev_connect_gpio_out() for the PLICMode_M compared to the PLICMode_S > case. > > This ensures that we do that correctly without breaking anything. > > How does that look to you? > > Ahh yes. That makes sense. Tested the updated change on multi-socket as well. > Alistair > > > qdev_get_gpio_in(DEVICE(cpu), > IRQ_M_EXT)); > > } > > if (plic->addr_config[i].mode == PLICMode_S) { > > -- > > 2.25.1 > > > > > [-- Attachment #2: Type: text/html, Size: 4050 bytes --] ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-07-27 19:08 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-07-23 9:03 [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton Atish Patra 2022-07-25 1:14 ` Alistair Francis 2022-07-25 22:30 ` Atish Kumar Patra 2022-07-27 7:38 ` Alistair Francis 2022-07-27 12:23 ` Alistair Francis 2022-07-27 19:01 ` Atish Kumar Patra
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