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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2607:f8b0:4864:20::a2f; envelope-from=alistair23@gmail.com; helo=mail-vk1-xa2f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Jun 4, 2024 at 10:46=E2=80=AFAM Alistair Francis wrote: > > On Wed, May 15, 2024 at 6:02=E2=80=AFPM Fea.Wang wr= ote: > > > > Add RISC-V privilege 1.13 support. > > > > Signed-off-by: Fea.Wang > > Reviewed-by: Frank Chang > > Reviewed-by: Weiwei Li > > Reviewed-by: LIU Zhiwei > > Reviewed-by: Alistair Francis Whoops, ignore this. > > Alistair > > > --- > > target/riscv/cpu.c | 6 +++++- > > target/riscv/cpu.h | 4 +++- > > target/riscv/cpu_cfg.h | 1 + > > target/riscv/tcg/tcg-cpu.c | 4 ++++ > > 4 files changed, 13 insertions(+), 2 deletions(-) > > > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > > index 6dd3d7f4a3..ee2ec4c4e5 100644 > > --- a/target/riscv/cpu.c > > +++ b/target/riscv/cpu.c > > @@ -1775,7 +1775,9 @@ static int priv_spec_from_str(const char *priv_sp= ec_str) > > { > > int priv_version =3D -1; > > > > - if (!g_strcmp0(priv_spec_str, PRIV_VER_1_12_0_STR)) { > > + if (!g_strcmp0(priv_spec_str, PRIV_VER_1_13_0_STR)) { > > + priv_version =3D PRIV_VERSION_1_13_0; > > + } else if (!g_strcmp0(priv_spec_str, PRIV_VER_1_12_0_STR)) { This patch should be split in half. We only want to expose this to user after it has been implemented. Alistair > > priv_version =3D PRIV_VERSION_1_12_0; > > } else if (!g_strcmp0(priv_spec_str, PRIV_VER_1_11_0_STR)) { > > priv_version =3D PRIV_VERSION_1_11_0; > > @@ -1795,6 +1797,8 @@ const char *priv_spec_to_str(int priv_version) > > return PRIV_VER_1_11_0_STR; > > case PRIV_VERSION_1_12_0: > > return PRIV_VER_1_12_0_STR; > > + case PRIV_VERSION_1_13_0: > > + return PRIV_VER_1_13_0_STR; > > default: > > return NULL; > > } > > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > > index 140eb43fcb..f691c7d828 100644 > > --- a/target/riscv/cpu.h > > +++ b/target/riscv/cpu.h > > @@ -96,12 +96,14 @@ extern RISCVCPUProfile *riscv_profiles[]; > > #define PRIV_VER_1_10_0_STR "v1.10.0" > > #define PRIV_VER_1_11_0_STR "v1.11.0" > > #define PRIV_VER_1_12_0_STR "v1.12.0" > > +#define PRIV_VER_1_13_0_STR "v1.13.0" > > enum { > > PRIV_VERSION_1_10_0 =3D 0, > > PRIV_VERSION_1_11_0, > > PRIV_VERSION_1_12_0, > > + PRIV_VERSION_1_13_0, > > > > - PRIV_VERSION_LATEST =3D PRIV_VERSION_1_12_0, > > + PRIV_VERSION_LATEST =3D PRIV_VERSION_1_13_0, > > }; > > > > #define VEXT_VERSION_1_00_0 0x00010000 > > diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h > > index e1e4f32698..fb7eebde52 100644 > > --- a/target/riscv/cpu_cfg.h > > +++ b/target/riscv/cpu_cfg.h > > @@ -136,6 +136,7 @@ struct RISCVCPUConfig { > > * TCG always implement/can't be user disabled, > > * based on spec version. > > */ > > + bool has_priv_1_13; > > bool has_priv_1_12; > > bool has_priv_1_11; > > > > diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c > > index fa186093fb..f53422d605 100644 > > --- a/target/riscv/tcg/tcg-cpu.c > > +++ b/target/riscv/tcg/tcg-cpu.c > > @@ -318,6 +318,10 @@ static void riscv_cpu_update_named_features(RISCVC= PU *cpu) > > cpu->cfg.has_priv_1_12 =3D true; > > } > > > > + if (cpu->env.priv_ver >=3D PRIV_VERSION_1_13_0) { > > + cpu->cfg.has_priv_1_13 =3D true; > > + } > > + > > /* zic64b is 1.12 or later */ > > cpu->cfg.ext_zic64b =3D cpu->cfg.cbom_blocksize =3D=3D 64 && > > cpu->cfg.cbop_blocksize =3D=3D 64 && > > -- > > 2.34.1 > > > >