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From: Alistair Francis <alistair23@gmail.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org, ajones@ventanamicro.com
Subject: Re: [PATCH v5 0/9] target/riscv/kvm: CSR related fixes
Date: Thu, 1 May 2025 09:41:09 +1000	[thread overview]
Message-ID: <CAKmqyKPBpOckC6-7TB2pdMLjjeCRyV4JDXeufcEEdpkvmocV6g@mail.gmail.com> (raw)
In-Reply-To: <20250429124421.223883-1-dbarboza@ventanamicro.com>

On Tue, Apr 29, 2025 at 10:46 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Hi,
>
> This version has a fix on patch 8 where I did use an extra variable and
> happened to set the wrong mask too.
>
> We'll let the compiler cast the uint32_t from an uint64_t reg. A cast
> was added for extra clarity when reading the code, although some picky
> toolchains might require an explicit cast in this case too.
>
> No other changes made.
>
> Patches missing acks/reviews: patch 8.
>
> Changes from v4:
> - patch 8:
>   - remove the 'reg32' variable and add an uint32_t cast when passing
>     the uint64_t var 'reg' to kvm_cpu_csr_set_u32()
> - v4 link: https://lore.kernel.org/qemu-riscv/20250428192323.84992-1-dbarboza@ventanamicro.com/
>
> Daniel Henrique Barboza (9):
>   target/riscv/kvm: minor fixes/tweaks
>   target/riscv/kvm: fix leak in kvm_riscv_init_multiext_cfg()
>   target/riscv/kvm: turn u32/u64 reg functions into macros
>   target/riscv/kvm: turn kvm_riscv_reg_id_ulong() into a macro
>   target/riscv/kvm: add kvm_csr_cfgs[]
>   target/riscv/kvm: do not read unavailable CSRs
>   target/riscv/kvm: add senvcfg CSR
>   target/riscv/kvm: read/write KVM regs via env size
>   target/riscv/kvm: add scounteren CSR

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/cpu.h         |   1 +
>  target/riscv/kvm/kvm-cpu.c | 333 +++++++++++++++++++++++--------------
>  2 files changed, 212 insertions(+), 122 deletions(-)
>
> --
> 2.49.0
>
>


      parent reply	other threads:[~2025-04-30 23:42 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-29 12:44 [PATCH v5 0/9] target/riscv/kvm: CSR related fixes Daniel Henrique Barboza
2025-04-29 12:44 ` [PATCH v5 1/9] target/riscv/kvm: minor fixes/tweaks Daniel Henrique Barboza
2025-04-29 12:44 ` [PATCH v5 2/9] target/riscv/kvm: fix leak in kvm_riscv_init_multiext_cfg() Daniel Henrique Barboza
2025-04-29 12:44 ` [PATCH v5 3/9] target/riscv/kvm: turn u32/u64 reg functions into macros Daniel Henrique Barboza
2025-04-29 12:44 ` [PATCH v5 4/9] target/riscv/kvm: turn kvm_riscv_reg_id_ulong() into a macro Daniel Henrique Barboza
2025-04-29 12:44 ` [PATCH v5 5/9] target/riscv/kvm: add kvm_csr_cfgs[] Daniel Henrique Barboza
2025-04-29 12:44 ` [PATCH v5 6/9] target/riscv/kvm: do not read unavailable CSRs Daniel Henrique Barboza
2025-04-30 23:15   ` Alistair Francis
2025-04-29 12:44 ` [PATCH v5 7/9] target/riscv/kvm: add senvcfg CSR Daniel Henrique Barboza
2025-04-30 23:16   ` Alistair Francis
2025-04-29 12:44 ` [PATCH v5 8/9] target/riscv/kvm: read/write KVM regs via env size Daniel Henrique Barboza
2025-04-29 15:01   ` Andrew Jones
2025-04-30 23:18   ` Alistair Francis
2025-04-29 12:44 ` [PATCH v5 9/9] target/riscv/kvm: add scounteren CSR Daniel Henrique Barboza
2025-04-30 23:18   ` Alistair Francis
2025-04-30 23:41 ` Alistair Francis [this message]

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