From: Alistair Francis <alistair23@gmail.com>
To: Anton Johansson <anjo@rev.ng>
Cc: qemu-devel@nongnu.org, pierrick.bouvier@linaro.org,
philmd@linaro.org, alistair.francis@wdc.com,
richard.henderson@linaro.org, palmer@dabbelt.com
Subject: Re: [PATCH 5/5] hw/riscv: Use runtime target_phys_addr_space_bits()
Date: Fri, 17 Oct 2025 09:43:18 +1000 [thread overview]
Message-ID: <CAKmqyKPCi=VPTOKydEw0urZOAGkoGMOFq-cD9aT0sMUoNCwHsA@mail.gmail.com> (raw)
In-Reply-To: <20251015-feature-single-binary-hw-v1-v1-5-8b416eda42cf@rev.ng>
On Wed, Oct 15, 2025 at 11:28 PM Anton Johansson via
<qemu-devel@nongnu.org> wrote:
>
> Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/riscv-iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
> index 450285a850..9ac37efc70 100644
> --- a/hw/riscv/riscv-iommu.c
> +++ b/hw/riscv/riscv-iommu.c
> @@ -2449,7 +2449,7 @@ static void riscv_iommu_instance_init(Object *obj)
>
> /* Report QEMU target physical address space limits */
> s->cap = set_field(s->cap, RISCV_IOMMU_CAP_PAS,
> - TARGET_PHYS_ADDR_SPACE_BITS);
> + target_phys_addr_space_bits());
>
> /* TODO: method to report supported PID bits */
> s->pid_bits = 8; /* restricted to size of MemTxAttrs.pid */
>
> --
> 2.51.0
>
>
prev parent reply other threads:[~2025-10-16 23:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-15 13:27 [PATCH 0/5] single-binary: Prepare hw/riscv for single compilation Anton Johansson via
2025-10-15 13:27 ` [PATCH 1/5] hw/riscv: Use generic hwaddr for firmware addressses Anton Johansson via
2025-10-15 14:21 ` Philippe Mathieu-Daudé
2025-10-23 17:14 ` Anton Johansson via
2025-10-23 17:55 ` Philippe Mathieu-Daudé
2025-10-15 13:27 ` [PATCH 2/5] hw/riscv: Replace target_ulong uses Anton Johansson via
2025-10-15 14:22 ` Philippe Mathieu-Daudé
2025-10-15 16:31 ` Richard Henderson
2025-10-15 16:50 ` Philippe Mathieu-Daudé
2025-10-15 13:27 ` [PATCH 3/5] hw/riscv: Widen OpenSBI dynamic info struct Anton Johansson via
2025-10-16 23:42 ` Alistair Francis
2025-10-15 13:27 ` [PATCH 4/5] target-info: Introduce runtime TARGET_PHYS_ADDR_SPACE_BITS Anton Johansson via
2025-10-15 14:32 ` Philippe Mathieu-Daudé
2025-10-17 16:11 ` Anton Johansson via
2025-10-17 18:47 ` Richard Henderson
2025-10-18 2:34 ` Bibo Mao
2025-10-15 13:27 ` [PATCH 5/5] hw/riscv: Use runtime target_phys_addr_space_bits() Anton Johansson via
2025-10-16 23:43 ` Alistair Francis [this message]
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