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Sun, 08 Mar 2026 21:56:12 -0700 (PDT) MIME-Version: 1.0 References: <20260306071105.3328365-1-max.chou@sifive.com> <20260306071105.3328365-5-max.chou@sifive.com> In-Reply-To: <20260306071105.3328365-5-max.chou@sifive.com> From: Alistair Francis Date: Mon, 9 Mar 2026 14:55:46 +1000 X-Gm-Features: AaiRm50_u4gmYIKQh3BeqEVxKIRP2bs6zMkfPEnI-jlDh5QjPQP18_6e3mD-vUA Message-ID: Subject: Re: [PATCH v5 4/9] target/riscv: rvv: Introduce reset_ill_vtype to reset illegal vtype CSR To: Max Chou Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Chao Liu Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=alistair23@gmail.com; helo=mail-ed1-x534.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Mar 6, 2026 at 5:13=E2=80=AFPM Max Chou wrote= : > > Replace the same vill reset flow by reset_ill_vtype function. > > Reviewed-by: Daniel Henrique Barboza > Reviewed-by: Chao Liu > Signed-off-by: Max Chou Reviewed-by: Alistair Francis Alistair > --- > target/riscv/vector_helper.c | 21 +++++++++++---------- > 1 file changed, 11 insertions(+), 10 deletions(-) > > diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c > index 7575e24084..b7105627ed 100644 > --- a/target/riscv/vector_helper.c > +++ b/target/riscv/vector_helper.c > @@ -49,6 +49,15 @@ static target_ulong vtype_reserved(CPURISCVState *env,= target_ulong vtype) > return reserved; > } > > +static inline void reset_ill_vtype(CPURISCVState *env) > +{ > + /* only set vill bit. */ > + env->vill =3D 1; > + env->vtype =3D 0; > + env->vl =3D 0; > + env->vstart =3D 0; > +} > + > target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1, > target_ulong s2, target_ulong x0) > { > @@ -93,11 +102,7 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, targe= t_ulong s1, > } > > if ((sew > cpu->cfg.elen) || vill || (vtype_reserved(env, s2) !=3D 0= )) { > - /* only set vill bit. */ > - env->vill =3D 1; > - env->vtype =3D 0; > - env->vl =3D 0; > - env->vstart =3D 0; > + reset_ill_vtype(env); > return 0; > } > > @@ -113,11 +118,7 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, targ= et_ulong s1, > } > > if (cpu->cfg.rvv_vsetvl_x0_vill && x0 && (env->vl !=3D vl)) { > - /* only set vill bit. */ > - env->vill =3D 1; > - env->vtype =3D 0; > - env->vl =3D 0; > - env->vstart =3D 0; > + reset_ill_vtype(env); > return 0; > } > > -- > 2.52.0 > >