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From: Alistair Francis <alistair23@gmail.com>
To: Jason Chien <jason.chien@sifive.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	 Anup Patel <apatel@ventanamicro.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	 Andrew Jones <ajones@ventanamicro.com>,
	 Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: Re: [PATCH 2/2] hw/intc: Make rtc variable names consistent
Date: Mon, 21 Aug 2023 13:52:56 -0400	[thread overview]
Message-ID: <CAKmqyKPCyx0fbiBzFDACDPHGYAdkjBJgcqHCVPFx0ETzRYpk3Q@mail.gmail.com> (raw)
In-Reply-To: <CADr__8rmCu9F2ktxYGtZfUeD_z+pNVa4KKsZ8XvxxVGmMJfrcw@mail.gmail.com>

On Mon, Aug 21, 2023 at 12:15 PM Jason Chien <jason.chien@sifive.com> wrote:
>
> Ping.

This has been applied to the RISC-V tree. It will go in after the QEMU
release freeze is over (probably a week or two).

Alistair

>
> On Fri, Aug 11, 2023 at 2:25 AM Alistair Francis <alistair23@gmail.com> wrote:
>>
>> On Fri, Jul 28, 2023 at 4:57 AM Jason Chien <jason.chien@sifive.com> wrote:
>> >
>> > The variables whose values are given by cpu_riscv_read_rtc() should be named
>> > "rtc". The variables whose value are given by cpu_riscv_read_rtc_raw()
>> > should be named "rtc_r".
>> >
>> > Signed-off-by: Jason Chien <jason.chien@sifive.com>
>>
>> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
>>
>> Alistair
>>
>> > ---
>> >  hw/intc/riscv_aclint.c | 6 +++---
>> >  1 file changed, 3 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c
>> > index bf77e29a70..25cf7a5d9d 100644
>> > --- a/hw/intc/riscv_aclint.c
>> > +++ b/hw/intc/riscv_aclint.c
>> > @@ -64,13 +64,13 @@ static void riscv_aclint_mtimer_write_timecmp(RISCVAclintMTimerState *mtimer,
>> >      uint64_t next;
>> >      uint64_t diff;
>> >
>> > -    uint64_t rtc_r = cpu_riscv_read_rtc(mtimer);
>> > +    uint64_t rtc = cpu_riscv_read_rtc(mtimer);
>> >
>> >      /* Compute the relative hartid w.r.t the socket */
>> >      hartid = hartid - mtimer->hartid_base;
>> >
>> >      mtimer->timecmp[hartid] = value;
>> > -    if (mtimer->timecmp[hartid] <= rtc_r) {
>> > +    if (mtimer->timecmp[hartid] <= rtc) {
>> >          /*
>> >           * If we're setting an MTIMECMP value in the "past",
>> >           * immediately raise the timer interrupt
>> > @@ -81,7 +81,7 @@ static void riscv_aclint_mtimer_write_timecmp(RISCVAclintMTimerState *mtimer,
>> >
>> >      /* otherwise, set up the future timer interrupt */
>> >      qemu_irq_lower(mtimer->timer_irqs[hartid]);
>> > -    diff = mtimer->timecmp[hartid] - rtc_r;
>> > +    diff = mtimer->timecmp[hartid] - rtc;
>> >      /* back to ns (note args switched in muldiv64) */
>> >      uint64_t ns_diff = muldiv64(diff, NANOSECONDS_PER_SECOND, timebase_freq);
>> >
>> > --
>> > 2.17.1
>> >
>> >


  reply	other threads:[~2023-08-21 17:54 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-28  8:24 [PATCH 1/2] hw/intc: Fix upper/lower mtime write calculation Jason Chien
2023-07-28  8:24 ` [PATCH 2/2] hw/intc: Make rtc variable names consistent Jason Chien
2023-08-08 18:40   ` Jason Chien
2023-08-10 18:24   ` Alistair Francis
2023-08-21 16:15     ` Jason Chien
2023-08-21 17:52       ` Alistair Francis [this message]
2023-08-23  8:04         ` Jason Chien
2023-08-08 18:41 ` [PATCH 1/2] hw/intc: Fix upper/lower mtime write calculation Jason Chien
2023-08-10 18:23 ` Alistair Francis

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