Re: [PATCH v2 0/5] target/riscv: Smepmp fixes to match specification

[Alistair Francis <alistair23@gmail.com>]

On Fri, Mar 14, 2025 at 5:33 AM Loïc Lefort <loic@rivosinc.com> wrote:
>
> These patches fix Smepmp implementation to make it compliant with the spec.
>
> First patch limits RLB to CSR changes since RLB should not affect privilege
> evaluation. Patch 2 extracts some common code into a function (to be used in
> patch 3). Patch 3 fixes validation of pmpcfg CSR writes in order to match Smepmp
> specification. Patch 4 is a small optimization and last patch is just removing
> redundant code.
>
> ---
> Changes in v2:
> - rebased to latest riscv-to-apply.next
> - addressed Daniel comments on patch 1
>
> Link to v1:
> https://lore.kernel.org/qemu-riscv/20250225160052.39564-1-loic@rivosinc.com/
>
> Loïc Lefort (5):
>   target/riscv: pmp: don't allow RLB to bypass rule privileges
>   target/riscv: pmp: move Smepmp operation conversion into a function
>   target/riscv: pmp: fix checks on writes to pmpcfg in Smepmp MML mode
>   target/riscv: pmp: exit csr writes early if value was not changed
>   target/riscv: pmp: remove redundant check in pmp_is_locked

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/pmp.c | 151 +++++++++++++++++++++++++--------------------
>  1 file changed, 83 insertions(+), 68 deletions(-)
>
> --
> 2.47.2
>
>