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From: Alistair Francis <alistair23@gmail.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Weiwei Li <liweiwei@iscas.ac.cn>,
	 Bin Meng <bin.meng@windriver.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	qemu-riscv@nongnu.org,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: Re: [PATCH 1/5] hw/riscv/opentitan: Rename machine_[class]_init() functions
Date: Thu, 25 May 2023 12:13:11 +1000	[thread overview]
Message-ID: <CAKmqyKPJJJxfu_eSh8y1UPZffKNcsG6GEQxrP4jguhntPHRXQA@mail.gmail.com> (raw)
In-Reply-To: <20230520054510.68822-2-philmd@linaro.org>

On Sat, May 20, 2023 at 3:47 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Follow QOM style which declares FOO_init() as instance
> initializer and FOO_class_init() as class initializer:
> rename the OpenTitan machine class/instance init()
> accordingly.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/riscv/opentitan.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index bc678766e7..2d21ee39c5 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -75,7 +75,7 @@ static const MemMapEntry ibex_memmap[] = {
>      [IBEX_DEV_FLASH_VIRTUAL] =  {  0x80000000,  0x80000     },
>  };
>
> -static void opentitan_board_init(MachineState *machine)
> +static void opentitan_machine_init(MachineState *machine)
>  {
>      MachineClass *mc = MACHINE_GET_CLASS(machine);
>      const MemMapEntry *memmap = ibex_memmap;
> @@ -108,17 +108,17 @@ static void opentitan_board_init(MachineState *machine)
>      }
>  }
>
> -static void opentitan_machine_init(MachineClass *mc)
> +static void opentitan_machine_class_init(MachineClass *mc)
>  {
>      mc->desc = "RISC-V Board compatible with OpenTitan";
> -    mc->init = opentitan_board_init;
> +    mc->init = opentitan_machine_init;
>      mc->max_cpus = 1;
>      mc->default_cpu_type = TYPE_RISCV_CPU_IBEX;
>      mc->default_ram_id = "riscv.lowrisc.ibex.ram";
>      mc->default_ram_size = ibex_memmap[IBEX_DEV_RAM].size;
>  }
>
> -DEFINE_MACHINE("opentitan", opentitan_machine_init)
> +DEFINE_MACHINE("opentitan", opentitan_machine_class_init)
>
>  static void lowrisc_ibex_soc_init(Object *obj)
>  {
> --
> 2.38.1
>
>


  parent reply	other threads:[~2023-05-25  2:14 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-20  5:45 [PATCH 0/5] hw/riscv/opentitan: Correct QOM type/size of OpenTitanState Philippe Mathieu-Daudé
2023-05-20  5:45 ` [PATCH 1/5] hw/riscv/opentitan: Rename machine_[class]_init() functions Philippe Mathieu-Daudé
2023-05-22 13:21   ` Daniel Henrique Barboza
2023-05-25  2:13   ` Alistair Francis [this message]
2023-05-20  5:45 ` [PATCH 2/5] hw/riscv/opentitan: Declare QOM types using DEFINE_TYPES() macro Philippe Mathieu-Daudé
2023-05-22 13:26   ` Daniel Henrique Barboza
2023-05-25  2:15   ` Alistair Francis
2023-05-20  5:45 ` [PATCH 3/5] hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition Philippe Mathieu-Daudé
2023-05-22 13:26   ` Daniel Henrique Barboza
2023-05-25  2:16   ` Alistair Francis
2023-05-20  5:45 ` [PATCH 4/5] hw/riscv/opentitan: Explicit machine type definition Philippe Mathieu-Daudé
2023-05-22 13:26   ` Daniel Henrique Barboza
2023-05-25  2:18   ` Alistair Francis
2023-05-20  5:45 ` [PATCH 5/5] hw/riscv/opentitan: Correct OpenTitanState parent type/size Philippe Mathieu-Daudé
2023-05-22 13:27   ` Daniel Henrique Barboza
2023-05-25  2:20   ` Alistair Francis
2023-05-25  2:21 ` [PATCH 0/5] hw/riscv/opentitan: Correct QOM type/size of OpenTitanState Alistair Francis

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