From: Alistair Francis <alistair23@gmail.com>
To: Michael Tokarev <mjt@tls.msk.ru>
Cc: qemu-devel@nongnu.org, Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PULL 00/56] riscv-to-apply queue
Date: Tue, 20 May 2025 15:47:18 +1000 [thread overview]
Message-ID: <CAKmqyKPZRw=6fJCuGTvh3G6uScjDdMyH9gumJmgAc=cnJrUPQw@mail.gmail.com> (raw)
In-Reply-To: <53d1f06e-4419-44f1-b53b-037dc266d767@tls.msk.ru>
On Tue, May 20, 2025 at 3:08 PM Michael Tokarev <mjt@tls.msk.ru> wrote:
>
> On 19.05.2025 07:04, alistair23@gmail.com wrote:
> > From: Alistair Francis <alistair.francis@wdc.com>
>
> > First RISC-V PR for 10.1
> >
> > * Add support for RIMT to virt machine ACPI
> > * Don't allow PMP RLB to bypass rule privileges
> > * Fix checks on writes to pmpcfg in Smepmp MML mode
> > * Generate strided vector loads/stores with tcg nodes
> > * Improve Microchip Polarfire SoC customization
> > * Use tcg ops generation to emulate whole reg rvv loads/stores
> > * Expand the probe_pages helper function to handle probe flags
> > * Fix type conflict of GLib function pointers
> > * Fix endless translation loop on big endian systems
> > * Use tail pseudoinstruction for calling tail
> > * Fix some RISC-V vector instruction corner cases
> > * MAINTAINERS: Add common-user/host/riscv to RISC-V section
> > * Fix write_misa vs aligned next_pc
> > * KVM CSR fixes
> > * Virt machine memmap usage cleanup
>
> Hi!
>
> Alistar, there are multiple patches in this pull request which
> are tagged for stable. Many of them (if not all) does not have
> a Fixes: tag, or any other indication where they're applicable.
Yeah, I tried to Cc stable if it was a fix.
> Is there some hint I can use to decide which active stable release
> to apply to, for each patch? Maybe we should apply most of them
My initial thinking was to apply all of the patches tagged for stable
if they apply cleanly. If the patch doesn't apply cleanly then just
skip it. Don't bother trying to get it to apply.
> just to the latest releases (current: 9.2, to be end-of-line
> after the next release, and 10.0), or some of them should be
> applied for older release (current: 7.2)?
That is also fine with me. Most of the fixes are for vector
instructions, which is a fast moving target anyway, so just getting
them in the latest release will be fine.
Patches with a Fixes tag should be applied to branches with the
relevant commits though.
Alistair
>
> Thanks,
>
> /mjt
prev parent reply other threads:[~2025-05-20 5:48 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-19 4:04 [PULL 00/56] riscv-to-apply queue alistair23
2025-05-19 4:04 ` [PULL 01/56] hw/riscv/virt: Add the BDF of IOMMU to RISCVVirtState structure alistair23
2025-05-19 4:04 ` [PULL 02/56] hw/riscv/virt-acpi-build: Add support for RIMT alistair23
2025-05-19 4:05 ` [PULL 03/56] target/riscv: pmp: don't allow RLB to bypass rule privileges alistair23
2025-05-19 4:05 ` [PULL 04/56] target/riscv: pmp: move Smepmp operation conversion into a function alistair23
2025-05-19 4:05 ` [PULL 05/56] target/riscv: pmp: fix checks on writes to pmpcfg in Smepmp MML mode alistair23
2025-05-19 4:05 ` [PULL 06/56] target/riscv: pmp: exit csr writes early if value was not changed alistair23
2025-05-19 4:05 ` [PULL 07/56] target/riscv: pmp: remove redundant check in pmp_is_locked alistair23
2025-05-19 4:05 ` [PULL 08/56] Generate strided vector loads/stores with tcg nodes alistair23
2025-05-19 4:05 ` [PULL 09/56] hw/misc: Add MPFS system reset support alistair23
2025-05-19 4:05 ` [PULL 10/56] hw/riscv: More flexible FDT placement for MPFS alistair23
2025-05-19 4:05 ` [PULL 11/56] hw/riscv: Make FDT optional " alistair23
2025-05-19 4:05 ` [PULL 12/56] hw/riscv: Allow direct start of kernel " alistair23
2025-05-19 4:05 ` [PULL 13/56] hw/riscv: Configurable MPFS CLINT timebase freq alistair23
2025-05-19 4:05 ` [PULL 14/56] hw/riscv: microchip_pfsoc: Rework documentation alistair23
2025-05-19 4:05 ` [PULL 15/56] target/riscv: use tcg ops generation to emulate whole reg rvv loads/stores alistair23
2025-05-19 4:05 ` [PULL 16/56] Expand the probe_pages helper function to handle probe flags alistair23
2025-05-19 4:05 ` [PULL 17/56] hw/riscv: Fix type conflict of GLib function pointers alistair23
2025-05-19 4:05 ` [PULL 18/56] target/riscv: fix endless translation loop on big endian systems alistair23
2025-05-19 4:05 ` [PULL 19/56] common-user/host/riscv: use tail pseudoinstruction for calling tail alistair23
2025-05-19 4:05 ` [PULL 20/56] target/riscv: rvv: Source vector registers cannot overlap mask register alistair23
2025-05-19 4:05 ` [PULL 21/56] target/riscv: rvv: Add CHECK arg to GEN_OPFVF_WIDEN_TRANS alistair23
2025-05-19 4:05 ` [PULL 22/56] target/riscv: rvv: Apply vext_check_input_eew to vrgather instructions to check mismatched input EEWs encoding constraint alistair23
2025-05-19 4:05 ` [PULL 23/56] target/riscv: rvv: Apply vext_check_input_eew to OPIVI/OPIVX/OPFVF(vext_check_ss) instructions alistair23
2025-05-19 4:05 ` [PULL 24/56] target/riscv: rvv: Apply vext_check_input_eew to OPIVV/OPFVV(vext_check_sss) instructions alistair23
2025-05-19 4:05 ` [PULL 25/56] target/riscv: rvv: Apply vext_check_input_eew to vector slide instructions(OPIVI/OPIVX) alistair23
2025-05-19 4:05 ` [PULL 26/56] target/riscv: rvv: Apply vext_check_input_eew to vector integer extension instructions(OPMVV) alistair23
2025-05-19 4:05 ` [PULL 27/56] target/riscv: rvv: Apply vext_check_input_eew to vector narrow/widen instructions alistair23
2025-05-19 4:05 ` [PULL 28/56] target/riscv: rvv: Apply vext_check_input_eew to vector indexed load/store instructions alistair23
2025-05-19 4:05 ` [PULL 29/56] target/riscv: Fix the rvv reserved encoding of unmasked instructions alistair23
2025-05-19 4:05 ` [PULL 30/56] target/riscv: Fix vslidedown with rvv_ta_all_1s alistair23
2025-05-19 4:05 ` [PULL 31/56] MAINTAINERS: Add common-user/host/riscv to RISC-V section alistair23
2025-05-19 4:05 ` [PULL 32/56] target/riscv: Pass ra to riscv_csr_write_fn alistair23
2025-05-19 4:05 ` [PULL 33/56] target/riscv: Pass ra to riscv_csrrw_do64 alistair23
2025-05-19 4:05 ` [PULL 34/56] target/riscv: Pass ra to riscv_csrrw_do128 alistair23
2025-05-19 4:05 ` [PULL 35/56] target/riscv: Pass ra to riscv_csrrw alistair23
2025-05-19 4:05 ` [PULL 36/56] target/riscv: Pass ra to riscv_csrrw_i128 alistair23
2025-05-19 4:05 ` [PULL 37/56] target/riscv: Move insn_len to internals.h alistair23
2025-05-19 4:05 ` [PULL 38/56] target/riscv: Fix write_misa vs aligned next_pc alistair23
2025-05-19 4:05 ` [PULL 39/56] target/riscv/kvm: minor fixes/tweaks alistair23
2025-05-19 4:05 ` [PULL 40/56] target/riscv/kvm: fix leak in kvm_riscv_init_multiext_cfg() alistair23
2025-05-19 4:05 ` [PULL 41/56] target/riscv/kvm: turn u32/u64 reg functions into macros alistair23
2025-05-19 4:05 ` [PULL 42/56] target/riscv/kvm: turn kvm_riscv_reg_id_ulong() into a macro alistair23
2025-05-19 4:05 ` [PULL 43/56] target/riscv/kvm: add kvm_csr_cfgs[] alistair23
2025-05-19 4:05 ` [PULL 44/56] target/riscv/kvm: do not read unavailable CSRs alistair23
2025-05-19 4:05 ` [PULL 45/56] target/riscv/kvm: add senvcfg CSR alistair23
2025-05-19 4:05 ` [PULL 46/56] target/riscv/kvm: read/write KVM regs via env size alistair23
2025-05-19 4:05 ` [PULL 47/56] target/riscv/kvm: add scounteren CSR alistair23
2025-10-24 13:43 ` Peter Maydell
2025-10-24 16:17 ` Daniel Henrique Barboza
2025-10-24 16:31 ` Peter Maydell
2025-10-25 16:45 ` Michael Tokarev
2025-10-26 0:36 ` Daniel Henrique Barboza
2025-10-26 7:15 ` Michael Tokarev
2025-05-19 4:05 ` [PULL 48/56] hw/riscv/virt.c: enforce s->memmap use in machine_init() alistair23
2025-05-19 4:05 ` [PULL 49/56] hw/riscv/virt.c: remove trivial virt_memmap references alistair23
2025-05-19 4:05 ` [PULL 50/56] hw/riscv/virt.c: use s->memmap in virt_machine_done() alistair23
2025-05-19 4:05 ` [PULL 51/56] hw/riscv/virt.c: add 'base' arg in create_fw_cfg() alistair23
2025-05-19 4:05 ` [PULL 52/56] hw/riscv/virt.c: use s->memmap in create_fdt() path alistair23
2025-05-19 4:05 ` [PULL 53/56] hw/riscv/virt.c: use s->memmap in create_fdt_sockets() path alistair23
2025-05-19 4:05 ` [PULL 54/56] hw/riscv/virt.c: use s->memmap in create_fdt_virtio() alistair23
2025-05-19 4:05 ` [PULL 55/56] hw/riscv/virt.c: use s->memmap in finalize_fdt() functions alistair23
2025-05-19 4:05 ` [PULL 56/56] hw/riscv/virt.c: remove 'long' casts in fmt strings alistair23
2025-05-19 21:17 ` [PULL 00/56] riscv-to-apply queue Stefan Hajnoczi
2025-05-20 5:08 ` Michael Tokarev
2025-05-20 5:47 ` Alistair Francis [this message]
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