From: Alistair Francis <alistair23@gmail.com>
To: Ethan Chen <ethan84@andestech.com>
Cc: qemu-devel@nongnu.org, richard.henderson@linaro.org,
pbonzini@redhat.com, peterx@redhat.com, david@redhat.com,
philmd@linaro.org, palmer@dabbelt.com, alistair.francis@wdc.com,
bmeng.cn@gmail.com, liwei1518@gmail.com,
dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com,
qemu-riscv@nongnu.org
Subject: Re: [PATCH v8 3/8] target/riscv: Add support for IOPMP
Date: Thu, 8 Aug 2024 14:13:00 +1000 [thread overview]
Message-ID: <CAKmqyKPdAKu6McnsjGXd0KSf_rV_ESk+t_z7H9DiFjR01msVHg@mail.gmail.com> (raw)
In-Reply-To: <20240715095702.1222213-4-ethan84@andestech.com>
On Mon, Jul 15, 2024 at 7:58 PM Ethan Chen via <qemu-devel@nongnu.org> wrote:
>
> Signed-off-by: Ethan Chen <ethan84@andestech.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/cpu_cfg.h | 2 ++
> target/riscv/cpu_helper.c | 18 +++++++++++++++---
> 2 files changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index fb7eebde52..2946fec20c 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -164,6 +164,8 @@ struct RISCVCPUConfig {
> bool pmp;
> bool debug;
> bool misa_w;
> + bool iopmp;
> + uint32_t iopmp_rrid;
>
> bool short_isa_string;
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 6709622dd3..c2d6a874da 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -1418,9 +1418,21 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> }
>
> if (ret == TRANSLATE_SUCCESS) {
> - tlb_set_page(cs, address & ~(tlb_size - 1), pa & ~(tlb_size - 1),
> - prot, mmu_idx, tlb_size);
> - return true;
> + if (cpu->cfg.iopmp) {
> + /*
> + * Do not align address on early stage because IOPMP needs origin
> + * address for permission check.
> + */
> + tlb_set_page_with_attrs(cs, address, pa,
> + (MemTxAttrs)
> + {
> + .requester_id = cpu->cfg.iopmp_rrid,
> + },
> + prot, mmu_idx, tlb_size);
> + } else {
> + tlb_set_page(cs, address & ~(tlb_size - 1), pa & ~(tlb_size - 1),
> + prot, mmu_idx, tlb_size);
> + }
> } else if (probe) {
> return false;
> } else {
> --
> 2.34.1
>
>
next prev parent reply other threads:[~2024-08-08 4:14 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-15 9:56 [PATCH v8 0/8] Support RISC-V IOPMP Ethan Chen via
2024-07-15 9:56 ` [PATCH v8 1/8] memory: Introduce memory region fetch operation Ethan Chen via
2024-07-15 9:56 ` [PATCH v8 2/8] system/physmem: Support IOMMU granularity smaller than TARGET_PAGE size Ethan Chen via
2024-08-08 4:12 ` Alistair Francis
2024-07-15 9:56 ` [PATCH v8 3/8] target/riscv: Add support for IOPMP Ethan Chen via
2024-08-08 4:13 ` Alistair Francis [this message]
2024-07-15 9:56 ` [PATCH v8 4/8] hw/misc/riscv_iopmp: Add RISC-V IOPMP device Ethan Chen via
2024-08-08 3:56 ` Alistair Francis
2024-08-09 9:42 ` Ethan Chen via
2024-08-12 0:42 ` Alistair Francis
2024-08-09 10:03 ` Ethan Chen via
2024-07-15 10:12 ` [PATCH v8 5/8] hw/misc/riscv_iopmp: Add API to set up IOPMP protection for system memory Ethan Chen via
2024-08-08 4:23 ` Alistair Francis
2024-08-09 10:11 ` Ethan Chen via
2024-08-12 0:47 ` Alistair Francis
2024-08-12 2:44 ` Ethan Chen via
2024-07-15 10:14 ` [PATCH v8 6/8] hw/misc/riscv_iopmp: Add API to configure RISCV CPU IOPMP support Ethan Chen via
2024-08-08 4:25 ` Alistair Francis
2024-08-09 9:56 ` Ethan Chen via
2024-07-15 10:14 ` [PATCH v8 7/8] hw/misc/riscv_iopmp: Add DMA operation with IOPMP support API Ethan Chen via
2024-07-15 10:14 ` [PATCH v8 8/8] hw/riscv/virt: Add IOPMP support Ethan Chen via
2024-08-08 4:01 ` Alistair Francis
2024-08-09 10:14 ` Ethan Chen via
2024-08-12 0:48 ` Alistair Francis
2024-08-12 2:55 ` Ethan Chen via
2024-11-05 18:36 ` [PATCH v8 0/8] Support RISC-V IOPMP Daniel Henrique Barboza
2024-11-08 1:16 ` Ethan Chen via
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