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From: Alistair Francis <alistair23@gmail.com>
To: Rob Bradford <rbradford@rivosinc.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	atishp@rivosinc.com,  palmer@dabbelt.com,
	alistair.francis@wdc.com, bin.meng@windriver.com,
	 liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com,
	zhiwei_liu@linux.alibaba.com,
	 "reviewer:Incompatible changes" <libvir-list@redhat.com>
Subject: Re: [PATCH v4 5/6] docs/about/deprecated: Document RISC-V "pmu-num" deprecation
Date: Mon, 23 Oct 2023 12:04:02 +1000	[thread overview]
Message-ID: <CAKmqyKPeyseoGFtpHefWvLWSjjpZaAbBbSoQZyvb5Ti3SiGKsw@mail.gmail.com> (raw)
In-Reply-To: <20231018154434.17367-6-rbradford@rivosinc.com>

On Thu, Oct 19, 2023 at 1:47 AM Rob Bradford <rbradford@rivosinc.com> wrote:
>
> This has been replaced by a "pmu-mask" property that provides much more
> flexibility.
>
> Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
> Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  docs/about/deprecated.rst | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
> index 2febd2d12f..857b5d4fc4 100644
> --- a/docs/about/deprecated.rst
> +++ b/docs/about/deprecated.rst
> @@ -405,6 +405,18 @@ Specifying the iSCSI password in plain text on the command line using the
>  used instead, to refer to a ``--object secret...`` instance that provides
>  a password via a file, or encrypted.
>
> +CPU device properties
> +'''''''''''''''''''''
> +
> +``pmu-num=n`` on RISC-V CPUs (since 8.2)
> +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> +
> +In order to support more flexible counter configurations this has been replaced
> +by a ``pmu-mask`` property. If set of counters is continuous then the mask can
> +be calculated with ``((2 ^ n) - 1) << 3``. The least significant three bits
> +must be left clear.
> +
> +
>  Backwards compatibility
>  -----------------------
>
> --
> 2.41.0
>
>


  reply	other threads:[~2023-10-23  2:05 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-18 15:39 [PATCH v4 0/6] Support discontinuous PMU counters Rob Bradford
2023-10-18 15:39 ` [PATCH v4 1/6] target/riscv: Propagate error from PMU setup Rob Bradford
2023-10-24  0:03   ` Atish Kumar Patra
2023-10-18 15:39 ` [PATCH v4 2/6] target/riscv: Don't assume PMU counters are continuous Rob Bradford
2023-10-24  0:05   ` Atish Kumar Patra
2023-10-18 15:39 ` [PATCH v4 3/6] target/riscv: Use existing PMU counter mask in FDT generation Rob Bradford
2023-10-24  0:06   ` Atish Kumar Patra
2023-10-18 15:39 ` [PATCH v4 4/6] target/riscv: Add "pmu-mask" property to replace "pmu-num" Rob Bradford
2023-10-23  2:02   ` Alistair Francis
2023-10-31 15:43     ` Rob Bradford
2023-10-18 15:39 ` [PATCH v4 5/6] docs/about/deprecated: Document RISC-V "pmu-num" deprecation Rob Bradford
2023-10-23  2:04   ` Alistair Francis [this message]
2023-10-24  0:30     ` Atish Kumar Patra
2023-10-18 15:39 ` [PATCH v4 6/6] target/riscv: Use MAKE_64BIT_MASK instead of custom macro Rob Bradford
2023-10-24  0:31   ` Atish Kumar Patra

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