From: Alistair Francis <alistair23@gmail.com>
To: Anup Patel <anup.patel@wdc.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH 1/2] hw/riscv: sifive_u: Allow passing custom DTB
Date: Fri, 23 Oct 2020 16:32:32 -0700 [thread overview]
Message-ID: <CAKmqyKPfFLDQFR=BkTnV-M471d7ApT8OMAY8swiCwAXaTXG-8g@mail.gmail.com> (raw)
In-Reply-To: <20201022053225.2596110-1-anup.patel@wdc.com>
On Wed, Oct 21, 2020 at 10:33 PM Anup Patel <anup.patel@wdc.com> wrote:
>
> Extend sifive_u machine to allow passing custom DTB using "-dtb"
> command-line parameter. This will help users pass modified DTB
> or Linux SiFive DTB to sifive_u machine.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/sifive_u.c | 28 ++++++++++++++++++++--------
> 1 file changed, 20 insertions(+), 8 deletions(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 6ad975d692..554e38abf0 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -100,14 +100,25 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
> int cpu;
> uint32_t *cells;
> char *nodename;
> + const char *dtb_filename;
> char ethclk_names[] = "pclk\0hclk";
> uint32_t plic_phandle, prci_phandle, gpio_phandle, phandle = 1;
> uint32_t hfclk_phandle, rtcclk_phandle, phy_phandle;
>
> - fdt = s->fdt = create_device_tree(&s->fdt_size);
> - if (!fdt) {
> - error_report("create_device_tree() failed");
> - exit(1);
> + dtb_filename = qemu_opt_get(qemu_get_machine_opts(), "dtb");
> + if (dtb_filename) {
> + fdt = s->fdt = load_device_tree(dtb_filename, &s->fdt_size);
> + if (!fdt) {
> + error_report("load_device_tree() failed");
> + exit(1);
> + }
> + goto update_bootargs;
> + } else {
> + fdt = s->fdt = create_device_tree(&s->fdt_size);
> + if (!fdt) {
> + error_report("create_device_tree() failed");
> + exit(1);
> + }
> }
>
> qemu_fdt_setprop_string(fdt, "/", "model", "SiFive HiFive Unleashed A00");
> @@ -390,13 +401,14 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
>
> qemu_fdt_add_subnode(fdt, "/chosen");
> qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);
> - if (cmdline) {
> - qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", cmdline);
> - }
> -
> qemu_fdt_setprop_string(fdt, "/aliases", "serial0", nodename);
>
> g_free(nodename);
> +
> +update_bootargs:
> + if (cmdline) {
> + qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", cmdline);
> + }
> }
>
> static void sifive_u_machine_reset(void *opaque, int n, int level)
> --
> 2.25.1
>
>
next prev parent reply other threads:[~2020-10-23 23:45 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-22 5:32 [PATCH 1/2] hw/riscv: sifive_u: Allow passing custom DTB Anup Patel
2020-10-22 5:32 ` [PATCH 2/2] hw/riscv: virt: " Anup Patel
2020-10-23 23:33 ` Alistair Francis
2020-10-23 23:32 ` Alistair Francis [this message]
2021-03-24 13:41 ` [PATCH 1/2] hw/riscv: sifive_u: " Bin Meng
2021-03-26 13:29 ` Bin Meng
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