Re: [PATCH for-10.0 7/7] docs/specs: add riscv-iommu-sys information

[Alistair Francis <alistair23@gmail.com>]

On Wed, Nov 6, 2024 at 11:35 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  docs/specs/riscv-iommu.rst | 30 +++++++++++++++++++++++++++---
>  docs/system/riscv/virt.rst | 10 ++++++++++
>  2 files changed, 37 insertions(+), 3 deletions(-)
>
> diff --git a/docs/specs/riscv-iommu.rst b/docs/specs/riscv-iommu.rst
> index 463f4cffb6..b1538c9ead 100644
> --- a/docs/specs/riscv-iommu.rst
> +++ b/docs/specs/riscv-iommu.rst
> @@ -6,9 +6,9 @@ RISC-V IOMMU support for RISC-V machines
>  QEMU implements a RISC-V IOMMU emulation based on the RISC-V IOMMU spec
>  version 1.0 `iommu1.0`_.
>
> -The emulation includes a PCI reference device, riscv-iommu-pci, that QEMU
> -RISC-V boards can use.  The 'virt' RISC-V machine is compatible with this
> -device.
> +The emulation includes a PCI reference device (riscv-iommu-pci) and a platform
> +bus device (riscv-iommu-sys) that QEMU RISC-V boards can use.  The 'virt'
> +RISC-V machine is compatible with both devices.
>
>  riscv-iommu-pci reference device
>  --------------------------------
> @@ -83,6 +83,30 @@ Several options are available to control the capabilities of the device, namely:
>  - "s-stage": enable s-stage support
>  - "g-stage": enable g-stage support
>
> +riscv-iommu-sys device
> +----------------------
> +
> +This device implements the RISC-V IOMMU emulation as a platform bus device that
> +RISC-V boards can use.
> +
> +For the 'virt' board the device is disabled by default.  To enable it use the
> +'iommu-sys' machine option:
> +
> +.. code-block:: bash
> +
> +  $ qemu-system-riscv64 -M virt,iommu-sys=on (...)
> +
> +There is no options to configure the capabilities of this device in the 'virt'
> +board using the QEMU command line.  The device is configured with the following
> +riscv-iommu options:
> +
> +- "ioatc-limit": default value (2Mb)
> +- "intremap": enabled
> +- "ats": enabled
> +- "off": on (DMA disabled)
> +- "s-stage": enabled
> +- "g-stage": enabled
> +
>  .. _iommu1.0: https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0/riscv-iommu.pdf
>
>  .. _linux-v8: https://lore.kernel.org/linux-riscv/cover.1718388908.git.tjeznach@rivosinc.com/
> diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst
> index 8e9a2e4dda..537aac0340 100644
> --- a/docs/system/riscv/virt.rst
> +++ b/docs/system/riscv/virt.rst
> @@ -94,6 +94,12 @@ command line:
>
>    $ qemu-system-riscv64 -M virt -device riscv-iommu-pci (...)
>
> +It also has support for the riscv-iommu-sys platform device:
> +
> +.. code-block:: bash
> +
> +  $ qemu-system-riscv64 -M virt,iommu-sys=on (...)
> +
>  Refer to :ref:`riscv-iommu` for more information on how the RISC-V IOMMU support
>  works.
>
> @@ -129,6 +135,10 @@ The following machine-specific options are supported:
>    having AIA IMSIC (i.e. "aia=aplic-imsic" selected). When not specified,
>    the default number of per-HART VS-level AIA IMSIC pages is 0.
>
> +- iommu-sys=[on|off]
> +
> +  Enables the riscv-iommu-sys platform device. Defaults to 'off'.
> +
>  Running Linux kernel
>  --------------------
>
> --
> 2.45.2
>
>