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Iglesias" Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2607:f8b0:4864:20::141; envelope-from=alistair23@gmail.com; helo=mail-il1-x141.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: figlesia@xilinx.com, Peter Maydell , Edgar Iglesias , Sai Pavan Boddu , Francisco Iglesias , Alistair Francis , Richard Henderson , "qemu-devel@nongnu.org Developers" , KONRAD Frederic , Stefano Stabellini , qemu-arm , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Luc Michel Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, Aug 28, 2020 at 4:41 AM Edgar E. Iglesias wrote: > > From: "Edgar E. Iglesias" > > When the CPU has exceptions disabled, avoid unwinding CPU > state and clobbering registers if we're not going to raise > any exception. > > Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Alistair > --- > target/microblaze/op_helper.c | 19 +++++++------------ > 1 file changed, 7 insertions(+), 12 deletions(-) > > diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c > index 13ac476199..190cd96c6a 100644 > --- a/target/microblaze/op_helper.c > +++ b/target/microblaze/op_helper.c > @@ -483,22 +483,17 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, > cpu = MICROBLAZE_CPU(cs); > env = &cpu->env; > > - cpu_restore_state(cs, retaddr, true); > if (!(env->sregs[SR_MSR] & MSR_EE)) { > return; > } > > - env->sregs[SR_EAR] = addr; > - if (access_type == MMU_INST_FETCH) { > - if (cpu->cfg.iopb_bus_exception) { > - env->sregs[SR_ESR] = ESR_EC_INSN_BUS; > - helper_raise_exception(env, EXCP_HW_EXCP); > - } > - } else { > - if (cpu->cfg.dopb_bus_exception) { > - env->sregs[SR_ESR] = ESR_EC_DATA_BUS; > - helper_raise_exception(env, EXCP_HW_EXCP); > - } > + if ((access_type == MMU_INST_FETCH && cpu->cfg.iopb_bus_exception) || > + (access_type != MMU_INST_FETCH && cpu->cfg.dopb_bus_exception)) { > + cpu_restore_state(cs, retaddr, true); > + env->sregs[SR_ESR] = access_type == MMU_INST_FETCH ? > + ESR_EC_INSN_BUS : ESR_EC_DATA_BUS; > + env->sregs[SR_EAR] = addr; > + helper_raise_exception(env, EXCP_HW_EXCP); > } > } > #endif > -- > 2.25.1 > >