From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49061) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFOsR-0000rJ-5Y for qemu-devel@nongnu.org; Tue, 21 Jun 2016 12:50:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bFOsP-0008DK-2d for qemu-devel@nongnu.org; Tue, 21 Jun 2016 12:50:14 -0400 Received: from mail-ob0-x22f.google.com ([2607:f8b0:4003:c01::22f]:33323) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFOsO-0008DG-TZ for qemu-devel@nongnu.org; Tue, 21 Jun 2016 12:50:12 -0400 Received: by mail-ob0-x22f.google.com with SMTP id xn17so31103971obc.0 for ; Tue, 21 Jun 2016 09:50:12 -0700 (PDT) MIME-Version: 1.0 Sender: alistair23@gmail.com In-Reply-To: References: <8eb128d39abd89ae6a0d74e965c262650d3bf863.1463093051.git.alistair.francis@xilinx.com> From: Alistair Francis Date: Tue, 21 Jun 2016 09:49:42 -0700 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v6 05/13] register: QOMify List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Alistair Francis , Edgar Iglesias , QEMU Developers , Peter Crosthwaite , "Edgar E. Iglesias" , =?UTF-8?B?QWxleCBCZW5uw6ll?= , =?UTF-8?Q?Andreas_F=C3=A4rber?= , =?UTF-8?B?S09OUkFEIEZyw6lkw6lyaWM=?= On Fri, Jun 10, 2016 at 3:55 AM, Peter Maydell wrote: > On 12 May 2016 at 23:46, Alistair Francis wrote: >> From: Peter Crosthwaite >> >> QOMify registers as a child of TYPE_DEVICE. This allows registers to >> define GPIOs. >> >> Define an init helper that will do QOM initialisation. > > You should just squash this down into patch 2. It relies on some work from the previous two patches so it becomes a pretty big patch if they all get squashed together. I'd rather leave it separate like this. > >> Signed-off-by: Peter Crosthwaite >> Signed-off-by: Alistair Francis >> Reviewed-by: KONRAD Frederic >> --- > >> /** >> + * Initialize a register. GPIO's are setup as IOs to the specified device. >> + * Fast paths for eligible registers are enabled. >> + * @reg: Register to initialize >> + */ > > I can't work out what this documentation comment is trying to say. > How can a register have a GPIO? What does a fast path do, what > registers are elegible, why do I care whether they're enabled or not? I have updated it to this, which removes the fast path (that was left over) and explains more about GPIOs. /** * Initialize a register. This will also setup any GPIO links which are used * to connect register updates in one device to other devices. Generally this * is useful for interrupt propagation. * @reg: Register to initialize */ Thanks, Alistair > >> + >> +void register_init(RegisterInfo *reg); >> + >> +/** >> * Memory API MMIO write handler that will write to a Register API register. >> * _be for big endian variant and _le for little endian. >> * @opaque: RegisterInfo to write to >> -- >> 2.7.4 > > thanks > -- PMM >