From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "QEMU Developers" <qemu-devel@nongnu.org>,
"Christoffer Dall" <christoffer.dall@linaro.org>,
"Andreas Färber" <afaerber@suse.de>
Subject: Re: [Qemu-devel] [PATCH] target-arm: add support for v8 VMULL.P64 instruction
Date: Thu, 27 Mar 2014 12:30:37 +0100 [thread overview]
Message-ID: <CAKv+Gu8HfpBRa5HzTnrgMUVe7GLkku-LPVqZ9T=dwNY_m3jo9Q@mail.gmail.com> (raw)
In-Reply-To: <CAFEAcA8B=cJH+tpDCkHcr+xy_L8+fCqFwT4C0aNX6hSH4XY+qA@mail.gmail.com>
On 27 March 2014 11:55, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 27 March 2014 09:29, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
>> This adds support for the VMULL.P64 polynomial 64x64 to 128 bit multiplication
>> instruction, which is an optional feature that is part of the v8 Crypto
>> Extensions.
>
>> +void HELPER(crypto_pmull)(CPUARMState *env, uint32_t rd, uint32_t rn,
>> + uint32_t rm)
>> +{
>> + uint64_t n = float64_val(env->vfp.regs[rn]);
>> + uint64_t m = float64_val(env->vfp.regs[rm]);
>> + uint64_t d0 = (n & 1) ? m : 0;
>> + uint64_t d1 = 0;
>> + int shift;
>> +
>> + for (shift = 1; (n >>= 1); shift++) {
>> + if (n & 1) {
>> + d0 ^= m << shift;
>> + d1 ^= m >> (64 - shift);
>> + }
>> + }
>> + env->vfp.regs[rd] = make_float64(d0);
>> + env->vfp.regs[rd + 1] = make_float64(d1);
>> +}
>
> Surely we can reuse the helper we already have for implementing
> the A64 version of this instruction ?
>
Absolutely! I just wasn't aware there was one :-)
Regards,
Ard.
prev parent reply other threads:[~2014-03-27 11:30 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-27 9:29 [Qemu-devel] [PATCH] target-arm: add support for v8 VMULL.P64 instruction Ard Biesheuvel
2014-03-27 10:55 ` Peter Maydell
2014-03-27 11:30 ` Ard Biesheuvel [this message]
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