From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46005) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XRNKw-0001Qd-Ui for qemu-devel@nongnu.org; Tue, 09 Sep 2014 11:28:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XRNKp-0001Jo-5a for qemu-devel@nongnu.org; Tue, 09 Sep 2014 11:28:06 -0400 Received: from mail-lb0-f172.google.com ([209.85.217.172]:50494) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XRNKo-0001JI-RQ for qemu-devel@nongnu.org; Tue, 09 Sep 2014 11:27:59 -0400 Received: by mail-lb0-f172.google.com with SMTP id w7so4192648lbi.31 for ; Tue, 09 Sep 2014 08:27:50 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <1409919897-360-1-git-send-email-ard.biesheuvel@linaro.org> <1409919897-360-3-git-send-email-ard.biesheuvel@linaro.org> Date: Tue, 9 Sep 2014 17:27:50 +0200 Message-ID: From: Ard Biesheuvel Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v3 2/6] target-arm: do not set do_interrupt handler for AArch64 user mode List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Rob Herring , QEMU Developers , Christoffer Dall On 9 September 2014 17:25, Peter Maydell wrote: > On 5 September 2014 13:24, Ard Biesheuvel wrote: >> From: Rob Herring >> >> User mode emulation should never get interrupts and thus should not >> use the system emulation exception handler function. Remove the reference, >> and '#ifndef USER_MODE_ONLY' the function itself as well, so that we can add >> system mode only functionality to it. >> >> Signed-off-by: Rob Herring >> Signed-off-by: Ard Biesheuvel >> --- >> target-arm/cpu64.c | 2 ++ >> target-arm/helper-a64.c | 3 +++ >> 2 files changed, 5 insertions(+) >> >> diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c >> index aa42803959be..9f88b9f4eea0 100644 >> --- a/target-arm/cpu64.c >> +++ b/target-arm/cpu64.c >> @@ -196,7 +196,9 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void *data) >> { >> CPUClass *cc = CPU_CLASS(oc); >> >> +#if !defined(CONFIG_USER_ONLY) >> cc->do_interrupt = aarch64_cpu_do_interrupt; >> +#endif >> cc->set_pc = aarch64_cpu_set_pc; >> cc->gdb_read_register = aarch64_cpu_gdb_read_register; >> cc->gdb_write_register = aarch64_cpu_gdb_write_register; >> diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c >> index 2e9ef64786ae..89b913ee9396 100644 >> --- a/target-arm/helper-a64.c >> +++ b/target-arm/helper-a64.c >> @@ -438,6 +438,8 @@ uint64_t HELPER(crc32c_64)(uint64_t acc, uint64_t val, uint32_t bytes) >> return crc32c(acc, buf, bytes) ^ 0xffffffff; >> } >> >> +#if !defined(CONFIG_USER_ONLY) >> + >> /* Handle a CPU exception. */ >> void aarch64_cpu_do_interrupt(CPUState *cs) >> { >> @@ -512,3 +514,4 @@ void aarch64_cpu_do_interrupt(CPUState *cs) >> env->pc = addr; >> cs->interrupt_request |= CPU_INTERRUPT_EXITTB; >> } >> +#endif > > For consistency we need to not set do_interrupt in > the arm_cpu_class_init() function too. (Then we'll > have it be NULL in all cases, since v7m already > guards its assignment with an ifdef.) > Would you prefer a single patch that does both? Or a followup patch?