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From: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>,
	"aurelien@aurel32.net" <aurelien@aurel32.net>,
	"aleksandar.rikalo@rt-rk.com" <aleksandar.rikalo@rt-rk.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"amarkovic@wavecomp.com" <amarkovic@wavecomp.com>
Subject: Re: [PATCH v4 6/7] disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit instructions
Date: Fri, 24 Jan 2020 21:56:37 +0100	[thread overview]
Message-ID: <CAL1e-=hqgWesfm9f8fsSQ8JS54LybNMMGygbCNi0O+VyfSAJvg@mail.gmail.com> (raw)
In-Reply-To: <779b7b35-16a8-0538-ad87-fac218c93e82@linaro.org>

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On Friday, January 24, 2020, Richard Henderson <richard.henderson@linaro.org>
wrote:

> On 1/24/20 6:38 AM, Aleksandar Markovic wrote:
> > The basic disassembly logic was obtained by somewhat modified script
> > decodetree.py, and such output was further manually modified to
> > handle numerous details of micromips 32R6 instruction coding scheme.
>
> What modifications to the script?
> What manual modifications to the output?
>
> It's been a while since I looked at micromips, but I don't recall anything
> so
> odd that it couldn't be handled with the current output of decodetree.py.
>

I don't have dev setup at hand right now, but I can look it up in few days.
Some of the changes are purely of cosmetic nature (like outputing binary
instead of hex codes), but some are not. I can send you the whole modified
script, once I come back to my desk. There are some not-so-obvious
micromips oddities, if one delves enough into the coding scheme.

> +static void getAlias(char *buffer, int regNo)
> > +{
> > +    switch (regNo) {
> > +    case 0:
> > +        strncpy(buffer, "zero", 5);
> > +        break;
> > +    case 1:
> > +        strncpy(buffer, "at", 5);
> > +        break;
> > +    case 2:
> > +    case 3:
> > +        sprintf(buffer, "v%d", regNo - 2);
> > +        break;
> > +    case 4:
> > +    case 5:
> > +    case 6:
> > +    case 7:
> > +        sprintf(buffer, "a%d", regNo - 4);
> > +        break;
> > +    case 8:
> > +    case 9:
> > +    case 10:
> > +    case 11:
> > +    case 12:
> > +    case 13:
> > +    case 14:
> > +    case 15:
> > +        sprintf(buffer, "t%d", regNo - 8);
> > +        break;
> > +    case 16:
> > +    case 17:
> > +    case 18:
> > +    case 19:
> > +    case 20:
> > +    case 21:
> > +    case 22:
> > +    case 23:
> > +        sprintf(buffer, "s%d", regNo - 16);
> > +        break;
> > +    case 24:
> > +    case 25:
> > +        sprintf(buffer, "t%d", regNo - 16);
> > +        break;
> > +    case 28:
> > +        strncpy(buffer, "gp", 5);
> > +        break;
> > +    case 29:
> > +        strncpy(buffer, "sp", 5);
> > +        break;
> > +    case 30:
> > +        strncpy(buffer, "s8", 5);
> > +        break;
> > +    case 31:
> > +        strncpy(buffer, "ra", 5);
> > +        break;
> > +    default:
> > +        sprintf(buffer, "r%d", regNo);
> > +        break;
> > +    }
> > +}
>
> Surely this would be better as a const array of string literals.  There are
> only 32 of them after all.
>
> Then you can just return the const char *, which is much better than
> sprintf'ing into a caller-provided buffer of unknown size.
>
>
Right. Thank you. This is anyway still code-in-development, made just to do
the job, but it can be implemented better, like in the way you suggested.

Thanks again,

Aleksandar



>
> r~
>
>

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  reply	other threads:[~2020-01-24 20:57 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-24 16:38 [PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0 Aleksandar Markovic
2020-01-24 16:38 ` [PATCH v4 1/7] target/mips: Rectify documentation on deprecating r4k machine Aleksandar Markovic
2020-01-24 16:38 ` [PATCH v4 2/7] target/mips: Add support for MIPS<32|64>R6 CRC32 ISA Aleksandar Markovic
2020-01-24 16:38 ` [PATCH v4 3/7] target/mips: Amend CP0 WatchHi register implementation Aleksandar Markovic
2020-01-24 17:22   ` Aleksandar Rikalo
2020-01-24 16:38 ` [PATCH v4 4/7] target/mips: Add implementation of GINVT instruction Aleksandar Markovic
2020-01-24 17:23   ` Aleksandar Rikalo
2020-01-24 16:38 ` [PATCH v4 5/7] disas: Add a field for target-dependant data Aleksandar Markovic
2020-01-24 17:25   ` Aleksandar Rikalo
2020-01-24 16:38 ` [PATCH v4 6/7] disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit instructions Aleksandar Markovic
2020-01-24 19:44   ` Richard Henderson
2020-01-24 20:56     ` Aleksandar Markovic [this message]
2020-01-24 21:03       ` Richard Henderson
2020-01-24 23:38         ` Aleksandar Markovic
2020-01-25  7:51           ` Richard Henderson
2020-01-25 10:22             ` Aleksandar Markovic
2020-01-25 18:06               ` Richard Henderson
2020-01-24 16:38 ` [PATCH v4 7/7] disas: mips: Add micromips R6 disassembler - 32-bit instructions Aleksandar Markovic
2020-01-24 17:04 ` [PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0 no-reply
2020-01-24 18:09 ` no-reply

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