From: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
To: Michael Rolnik <mrolnik@gmail.com>
Cc: "thuth@redhat.com" <thuth@redhat.com>,
"me@xcancerberox.com.ar" <me@xcancerberox.com.ar>,
"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"dovgaluk@ispras.ru" <dovgaluk@ispras.ru>,
"imammedo@redhat.com" <imammedo@redhat.com>,
"philmd@redhat.com" <philmd@redhat.com>
Subject: Re: [PATCH v39 05/22] target/avr: Add instruction translation - Arithmetic and Logic Instructions
Date: Sun, 22 Dec 2019 16:41:04 +0100 [thread overview]
Message-ID: <CAL1e-=jKWmj9QUdEwsgrDvqb_quiHr7bfbWdt3Oyt322PP1Ltw@mail.gmail.com> (raw)
In-Reply-To: <20191218210329.1960-6-mrolnik@gmail.com>
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On Wednesday, December 18, 2019, Michael Rolnik <mrolnik@gmail.com> wrote:
> This includes:
> - ADD, ADC, ADIW
> - SBIW, SUB, SUBI, SBC, SBCI
> - AND, ANDI
> - OR, ORI, EOR
> - COM, NEG
> - INC, DEC
> - MUL, MULS, MULSU
> - FMUL, FMULS, FMULSU
> - DES
>
>
>
...
+
> +/*
> + * Performs the logical AND between the contents of register Rd and
> register
> + * Rr and places the result in the destination register Rd.
> + */
> +static bool trans_AND(DisasContext *ctx, arg_AND *a)
> +{
> + TCGv Rd = cpu_r[a->rd];
> + TCGv Rr = cpu_r[a->rr];
> + TCGv R = tcg_temp_new_i32();
> +
> + tcg_gen_and_tl(R, Rd, Rr); /* Rd = Rd and Rr */
> + tcg_gen_movi_tl(cpu_Vf, 0); /* Vf = 0 */
Hi, Michael.
Please add before this line a blank line and a comment:
/* update status register */
This is needed to visually separate core functionality and updating status
register in trans_AND() function.
And please repeat that for all instructions that update status register.
Regards,
Aleksandar
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next prev parent reply other threads:[~2019-12-22 15:42 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-18 21:03 [PATCH v39 00/22] QEMU AVR 8 bit cores Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 01/22] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-12-21 10:53 ` Aleksandar Markovic
2019-12-21 11:22 ` Philippe Mathieu-Daudé
2019-12-21 12:32 ` Aleksandar Markovic
2019-12-18 21:03 ` [PATCH v39 02/22] target/avr: Add instruction helpers Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 03/22] target/avr: Add instruction decoding Michael Rolnik
2019-12-21 11:18 ` Aleksandar Markovic
2019-12-21 15:57 ` Michael Rolnik
2019-12-21 16:21 ` Aleksandar Markovic
2019-12-21 17:15 ` Aleksandar Markovic
2019-12-28 19:31 ` Michael Rolnik
2019-12-29 14:37 ` Aleksandar Markovic
2019-12-18 21:03 ` [PATCH v39 04/22] target/avr: Add instruction translation - Registers definition Michael Rolnik
2019-12-22 15:54 ` Aleksandar Markovic
2019-12-18 21:03 ` [PATCH v39 05/22] target/avr: Add instruction translation - Arithmetic and Logic Instructions Michael Rolnik
2019-12-22 15:41 ` Aleksandar Markovic [this message]
2019-12-18 21:03 ` [PATCH v39 06/22] target/avr: Add instruction translation - Branch Instructions Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 07/22] target/avr: Add instruction translation - Data Transfer Instructions Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 08/22] target/avr: Add instruction translation - Bit and Bit-test Instructions Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 09/22] target/avr: Add instruction translation - MCU Control Instructions Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 10/22] target/avr: Add instruction translation - CPU main translation function Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 11/22] target/avr: Add instruction disassembly function Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 12/22] target/avr: Add limited support for USART peripheral Michael Rolnik
2019-12-20 15:56 ` Philippe Mathieu-Daudé
2019-12-18 21:03 ` [PATCH v39 13/22] target/avr: Add limited support for 16 bit timer peripheral Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 14/22] target/avr: Add dummy mask device Michael Rolnik
2019-12-23 8:46 ` Aleksandar Markovic
2019-12-28 18:52 ` Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 15/22] target/avr: Add example board configuration Michael Rolnik
2019-12-20 9:51 ` Igor Mammedov
2019-12-20 12:30 ` Michael Rolnik
2019-12-20 15:18 ` Igor Mammedov
2019-12-20 23:12 ` Philippe Mathieu-Daudé
2020-01-21 21:32 ` Philippe Mathieu-Daudé
2019-12-18 21:03 ` [PATCH v39 16/22] target/avr: Add section about AVR into QEMU documentation Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 17/22] target/avr: Register AVR support with the rest of QEMU Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 18/22] target/avr: Add machine none test Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 19/22] target/avr: Update build system Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 20/22] target/avr: Add boot serial test Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 21/22] target/avr: Add Avocado test Michael Rolnik
2019-12-18 21:03 ` [PATCH v39 22/22] target/avr: Update MAINTAINERS file Michael Rolnik
2019-12-23 8:56 ` Aleksandar Markovic
2019-12-23 9:13 ` [PATCH v39 00/22] QEMU AVR 8 bit cores Aleksandar Markovic
2019-12-28 18:01 ` Michael Rolnik
2019-12-28 19:38 ` Aleksandar Markovic
2019-12-28 20:00 ` Michael Rolnik
2019-12-29 14:19 ` Aleksandar Markovic
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