From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:59893) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T4lWD-0000DM-03 for qemu-devel@nongnu.org; Fri, 24 Aug 2012 00:29:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1T4lWA-00016g-5E for qemu-devel@nongnu.org; Fri, 24 Aug 2012 00:29:12 -0400 Received: from mail-vb0-f45.google.com ([209.85.212.45]:39226) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1T4lWA-00016c-15 for qemu-devel@nongnu.org; Fri, 24 Aug 2012 00:29:10 -0400 Received: by vbip1 with SMTP id p1so1586570vbi.4 for ; Thu, 23 Aug 2012 21:29:09 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20120824040645.GA62833@cs.nctu.edu.tw> References: <20120823031446.GB27969@cs.nctu.edu.tw> <20120823101129.GA40283@cs.nctu.edu.tw> <20120824025721.GA62179@cs.nctu.edu.tw> <20120824040645.GA62833@cs.nctu.edu.tw> Date: Thu, 23 Aug 2012 21:29:09 -0700 Message-ID: From: Xin Tong Content-Type: text/plain; charset=Big5 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] passing translated address out in QEMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?6Zmz6Z+L5Lu7IChXZWktUmVuIENoZW4p?= Cc: Peter Maydell , qemu-devel On Thu, Aug 23, 2012 at 9:06 PM, =B3=AF=AD=B3=A5=F4 (Wei-Ren Chen) wrote: >> That might be difficult. what i did was that i disabled inlined >> translated and push the virt/phys address into 2 new fields in the cpu >> structure in the call out lookup. because in the callout lookup we >> have a handle to the cpu env. > > What you mean by "disabled inlined translated"? You mean apply Max's > patch so that all guest memory access go through the slow path without > looking software tlb? Since you said you're running arm on x86 host, > I guess what you did might be, > > int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address, > int access_type, int mmu_idx) > { > ... > > ret =3D get_phys_addr(env, address, access_type, is_user, &phys_addr,= &prot, > &page_size); > > // store phys_addr into env->cpu_last_paddr > > ... > } > >> not too sure how much impact inlined lookup has on the performance. >> since i disabled it, next step i would just get rid of that piece of >> generated assembly, as it is no good for icache ( generated for every >> memory operation). > > You can run a benchmark inside your guest. I guess if you run a > long-running benchmark, you can see performance degradation. If software > tlb hit, you can get the value of guest memory in the code cache > with a few host instructions. Disabling software tlb lookup, every guest > memory access will call a helper function which takes a lot of time. > What you mean by "get rid of that piece of generated assembly"? every inlined TLB lookup has ~10 instructions . Xin > > Regards, > chenwj > > -- > Wei-Ren Chen (=B3=AF=AD=B3=A5=F4) > Computer Systems Lab, Institute of Information Science, > Academia Sinica, Taiwan (R.O.C.) > Tel:886-2-2788-3799 #1667 > Homepage: http://people.cs.nctu.edu.tw/~chenwj