From: Yoshinori Sato <yo-satoh@sios.com>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v11 00/12] Add RX archtecture support
Date: Tue, 14 May 2019 11:17:33 +0900 [thread overview]
Message-ID: <CAL_XjKWOimLzHs8JeyEJzEOF-T-poJU5LsYJUQtnSPtiPwh2zg@mail.gmail.com> (raw)
In-Reply-To: <7fcd8994-1549-fb6f-d7c2-5ad4558767c3@redhat.com>
Oh. Sorry.
I fount one other problem.
I will fix it and re-send later.
2019年5月14日(火) 2:26 Philippe Mathieu-Daudé <philmd@redhat.com>:
>
> Hi Yoshinori,
>
> On 5/13/19 7:25 AM, Yoshinori Sato wrote:
> > Hello.
> > This patch series is added Renesas RX target emulation.
> >
> > Fixed build errors and cleaned up the code.
> >
> > My git repository is bellow.
> > git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git tags/rx-20190513
>
> This tag isn't exactly the same as the series you posted, some patches
> are ordered differently, leading to this failure at commit fc564da941a
> (Add rx-softmmu) of your tag:
>
> ((fc564da941a...))$ make -C rx-softmmu hw/intc/rx_icu.o
> CC hw/intc/rx_icu.o
> hw/intc/rx_icu.c:35:9: error: expected ‘)’ before numeric constant
> REG8(IR, 0)
> ^~
> )
> ...
> hw/intc/rx_icu.c: In function ‘icu_read’:
> hw/intc/rx_icu.c:174:18: error: ‘A_FIR’ undeclared (first use in this
> function); did you mean ‘A_FPSW’?
> if ((addr != A_FIR && size != 1) ||
> ^~~~~
> A_FPSW
> hw/intc/rx_icu.c:174:18: note: each undeclared identifier is reported
> only once for each function it appears in
> hw/intc/rx_icu.c:181:10: error: ‘A_IR’ undeclared (first use in this
> function); did you mean ‘DIR’?
> case A_IR ... A_IR + 0xff:
> ^~~~
> DIR
> ...
> hw/intc/rx_icu.c:199:44: error: ‘R_IRQCR_IRQMD_SHIFT’ undeclared (first
> use in this function); did you mean ‘R_IRQCR_IRQMD_MASK’?
> return icu->src[64 + reg].sense << R_IRQCR_IRQMD_SHIFT;
> ^~~~~~~~~~~~~~~~~~~
> R_IRQCR_IRQMD_MASK
>
> This is because the commit "hw/registerfields.h" is added after.
> I see this series seems ordered correctly, so I'll keep testing.
>
> >
> > Testing binaries bellow.
> > u-boot
> > Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bin.gz
> >
> > starting
> > $ gzip -d u-boot.bin.gz
> > $ qemu-system-rx -bios u-boot.bin
> >
> > linux and pico-root (only sash)
> > Download - https://osdn.net/users/ysato/pf/qemu/dl/zImage (kernel)
> > https://osdn.net/users/ysato/pf/qemu/dl/rx-qemu.dtb (DeviceTree)
> >
> > starting
> > $ qemu-system-rx -kernel zImage -dtb rx-qemu.dtb -append "earlycon"
> >
> > Changes for v10.
> > - Fix build error for 32bit system.
> > - Use "object_initialize_child" in create device instance.
> > - Remove unused headers.
> > - Avoid some magic number.
> > - Clean up Kconfig symbols.
> >
> > Yoshinori Sato (12):
> > target/rx: TCG translation
> > target/rx: TCG helper
> > target/rx: CPU definition
> > target/rx: RX disassembler
> > hw/intc: RX62N interrupt controller (ICUa)
> > hw/timer: RX62N internal timer modules
> > hw/char: RX62N serial communication interface (SCI)
> > hw/rx: RX Target hardware definition
> > hw/registerfields.h: Add 8bit and 16bit register macros.
> > qemu/bitops.h: Add extract8 and extract16
> > Add rx-softmmu
> > MAINTAINERS: Add RX
> >
> > MAINTAINERS | 19 +
> > arch_init.c | 2 +
> > configure | 8 +
> > default-configs/rx-softmmu.mak | 3 +
> > hw/Kconfig | 1 +
> > hw/char/Kconfig | 3 +
> > hw/char/Makefile.objs | 1 +
> > hw/char/renesas_sci.c | 340 ++++++
> > hw/intc/Kconfig | 3 +
> > hw/intc/Makefile.objs | 1 +
> > hw/intc/rx_icu.c | 376 +++++++
> > hw/rx/Kconfig | 14 +
> > hw/rx/Makefile.objs | 2 +
> > hw/rx/rx-virt.c | 105 ++
> > hw/rx/rx62n.c | 238 ++++
> > hw/timer/Kconfig | 6 +
> > hw/timer/Makefile.objs | 3 +
> > hw/timer/renesas_cmt.c | 275 +++++
> > hw/timer/renesas_tmr.c | 455 ++++++++
> > include/disas/dis-asm.h | 5 +
> > include/hw/char/renesas_sci.h | 45 +
> > include/hw/intc/rx_icu.h | 57 +
> > include/hw/registerfields.h | 32 +-
> > include/hw/rx/rx.h | 7 +
> > include/hw/rx/rx62n.h | 94 ++
> > include/hw/timer/renesas_cmt.h | 38 +
> > include/hw/timer/renesas_tmr.h | 50 +
> > include/qemu/bitops.h | 38 +
> > include/sysemu/arch_init.h | 1 +
> > target/rx/Makefile.objs | 12 +
> > target/rx/cpu.c | 222 ++++
> > target/rx/cpu.h | 227 ++++
> > target/rx/disas.c | 1480 ++++++++++++++++++++++++
> > target/rx/gdbstub.c | 112 ++
> > target/rx/helper.c | 148 +++
> > target/rx/helper.h | 31 +
> > target/rx/insns.decode | 621 ++++++++++
> > target/rx/monitor.c | 38 +
> > target/rx/op_helper.c | 481 ++++++++
> > target/rx/translate.c | 2432 ++++++++++++++++++++++++++++++++++++++++
> > 40 files changed, 8025 insertions(+), 1 deletion(-)
> > create mode 100644 default-configs/rx-softmmu.mak
> > create mode 100644 hw/char/renesas_sci.c
> > create mode 100644 hw/intc/rx_icu.c
> > create mode 100644 hw/rx/Kconfig
> > create mode 100644 hw/rx/Makefile.objs
> > create mode 100644 hw/rx/rx-virt.c
> > create mode 100644 hw/rx/rx62n.c
> > create mode 100644 hw/timer/renesas_cmt.c
> > create mode 100644 hw/timer/renesas_tmr.c
> > create mode 100644 include/hw/char/renesas_sci.h
> > create mode 100644 include/hw/intc/rx_icu.h
> > create mode 100644 include/hw/rx/rx.h
> > create mode 100644 include/hw/rx/rx62n.h
> > create mode 100644 include/hw/timer/renesas_cmt.h
> > create mode 100644 include/hw/timer/renesas_tmr.h
> > create mode 100644 target/rx/Makefile.objs
> > create mode 100644 target/rx/cpu.c
> > create mode 100644 target/rx/cpu.h
> > create mode 100644 target/rx/disas.c
> > create mode 100644 target/rx/gdbstub.c
> > create mode 100644 target/rx/helper.c
> > create mode 100644 target/rx/helper.h
> > create mode 100644 target/rx/insns.decode
> > create mode 100644 target/rx/monitor.c
> > create mode 100644 target/rx/op_helper.c
> > create mode 100644 target/rx/translate.c
> >
prev parent reply other threads:[~2019-05-14 2:18 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-13 5:25 [Qemu-devel] [PATCH v11 00/12] Add RX archtecture support Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 01/12] target/rx: TCG translation Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 02/12] target/rx: TCG helper Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 03/12] target/rx: CPU definition Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 04/12] target/rx: RX disassembler Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 05/12] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 06/12] hw/timer: RX62N internal timer modules Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 07/12] hw/char: RX62N serial communication interface (SCI) Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 08/12] hw/rx: RX Target hardware definition Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 09/12] hw/registerfields.h: Add 8bit and 16bit register macros Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 10/12] qemu/bitops.h: Add extract8 and extract16 Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 11/12] Add rx-softmmu Yoshinori Sato
2019-05-13 5:25 ` [Qemu-devel] [PATCH v11 12/12] MAINTAINERS: Add RX Yoshinori Sato
2019-05-13 17:26 ` [Qemu-devel] [PATCH v11 00/12] Add RX archtecture support Philippe Mathieu-Daudé
2019-05-14 2:17 ` Yoshinori Sato [this message]
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