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From: Anshul Makkar <anshul.makkar@profitbricks.com>
To: qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] virtio + virtq + iommu
Date: Fri, 18 Jul 2014 12:10:14 +0200	[thread overview]
Message-ID: <CAM4NYE-NX-E49MW8sxesg3cm-uLUEYEMePYwU5EFsqWNkMxdLw@mail.gmail.com> (raw)
In-Reply-To: <CAM4NYE8KGrQ0TCa1w986cvE-e=F2Gq-PVq=j3oUmVVUWSNfyxg@mail.gmail.com>

Further adding on to it.

 iotlb = mr->iommu_ops->translate(mr, addr) in address_space_translate
to get the translation from the tlb.

What I found is that the  "iommu_ops->translate" is assigned a
function pointer only for alpha/typhoon and ppc/spapr. What about x86.
Are we using any of these architectures for emulating
iommu for x86 ?

Anshul Makkar

On Tue, Jul 8, 2014 at 5:21 PM, Anshul Makkar
<anshul.makkar@profitbricks.com> wrote:
> Hi,
>
> Was tracing the buffer handling code flow after the kick has been
> initiated from the guest in case of virtio.
>
> Found this function
> cpu_physical_memory_map->address_space_map->address_space_translate
> which calls address_space_translate_internal and iommu->translate (get
> the translation from TLB) to get the corresponding host virtual
> address where I think the packet buffer is mapped to (from guest
> physical to host virtual).
>
> So, should I conclude that there is no hardware IOMMU involved in this
> translation. QEMU maintains its own TLB and translation mapping which
> is used. Or iommu->translate leads to hardware MMU call.
>
> We are developing a high speed packet transfer mechanism using
> infiniband cards. So, trying to analyse every possible bottleneck.
>
> Confused here, please suggest.
>
> Anshul Makkar
> www.justkernel.com

      parent reply	other threads:[~2014-07-18 10:10 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-08 15:21 [Qemu-devel] virtio + virtq + iommu Anshul Makkar
2014-07-09 14:18 ` Anshul Makkar
2014-07-18 10:10 ` Anshul Makkar [this message]

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