[Qemu-devel] virtio + virtq + iommu

[Qemu-devel] virtio + virtq + iommu

[Anshul Makkar]

Hi,

Was tracing the buffer handling code flow after the kick has been
initiated from the guest in case of virtio.

Found this function
cpu_physical_memory_map->address_space_map->address_space_translate
which calls address_space_translate_internal and iommu->translate (get
the translation from TLB) to get the corresponding host virtual
address where I think the packet buffer is mapped to (from guest
physical to host virtual).

So, should I conclude that there is no hardware IOMMU involved in this
translation. QEMU maintains its own TLB and translation mapping which
is used. Or iommu->translate leads to hardware MMU call.

We are developing a high speed packet transfer mechanism using
infiniband cards. So, trying to analyse every possible bottleneck.

Confused here, please suggest.

Anshul Makkar
www.justkernel.com

Re: [Qemu-devel] virtio + virtq + iommu

[Anshul Makkar]

Hi,

Any suggestions.

Anshul Makkar

On Tue, Jul 8, 2014 at 5:21 PM, Anshul Makkar
<anshul.makkar@profitbricks.com> wrote:
> Hi,
>
> Was tracing the buffer handling code flow after the kick has been
> initiated from the guest in case of virtio.
>
> Found this function
> cpu_physical_memory_map->address_space_map->address_space_translate
> which calls address_space_translate_internal and iommu->translate (get
> the translation from TLB) to get the corresponding host virtual
> address where I think the packet buffer is mapped to (from guest
> physical to host virtual).
>
> So, should I conclude that there is no hardware IOMMU involved in this
> translation. QEMU maintains its own TLB and translation mapping which
> is used. Or iommu->translate leads to hardware MMU call.
>
> We are developing a high speed packet transfer mechanism using
> infiniband cards. So, trying to analyse every possible bottleneck.
>
> Confused here, please suggest.
>
> Anshul Makkar
> www.justkernel.com

Re: [Qemu-devel] virtio + virtq + iommu

[Anshul Makkar]

Further adding on to it.

 iotlb = mr->iommu_ops->translate(mr, addr) in address_space_translate
to get the translation from the tlb.

What I found is that the  "iommu_ops->translate" is assigned a
function pointer only for alpha/typhoon and ppc/spapr. What about x86.
Are we using any of these architectures for emulating
iommu for x86 ?

Anshul Makkar

On Tue, Jul 8, 2014 at 5:21 PM, Anshul Makkar
<anshul.makkar@profitbricks.com> wrote:
> Hi,
>
> Was tracing the buffer handling code flow after the kick has been
> initiated from the guest in case of virtio.
>
> Found this function
> cpu_physical_memory_map->address_space_map->address_space_translate
> which calls address_space_translate_internal and iommu->translate (get
> the translation from TLB) to get the corresponding host virtual
> address where I think the packet buffer is mapped to (from guest
> physical to host virtual).
>
> So, should I conclude that there is no hardware IOMMU involved in this
> translation. QEMU maintains its own TLB and translation mapping which
> is used. Or iommu->translate leads to hardware MMU call.
>
> We are developing a high speed packet transfer mechanism using
> infiniband cards. So, trying to analyse every possible bottleneck.
>
> Confused here, please suggest.
>
> Anshul Makkar
> www.justkernel.com