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Date: Thu, 13 Nov 2014 16:30:10 +0100
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From: Christoffer Dall <christoffer.dall@linaro.org>
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Subject: Re: [Qemu-devel] qemu arm gic assert failed.
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To: Johan Karlsson <Johan.Karlsson@enea.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>

On Thu, Nov 13, 2014 at 4:25 PM, Johan Karlsson <Johan.Karlsson@enea.com> wrote:
>> -----Original Message-----
>> From: Christoffer Dall [mailto:christoffer.dall@linaro.org]
>> Sent: den 13 november 2014 15:28
>> On Thu, Nov 13, 2014 at 1:44 PM, Johan Karlsson
>> <Johan.Karlsson@enea.com> wrote:
>> > Hi,
>> > Enabled DEBUG_GIC in arm_gic.c
>> >
>> > Use case:
>> > Core0 wakes up core1 using irq and then core1 acks and runs eoi until it
>> gets 0x3ff.
>> > Note that core1 do not have interrupts enabled and does this in SVC.
>> >
>> > From what I can see s->current_pending[1] isn't updated in gic_update
>> because the following
>> >         if (!s->enabled || !s->cpu_enabled[cpu]) {
>> >             qemu_irq_lower(s->parent_irq[cpu]);
>> >             return;
>> >         }
>> > Is true for core0 after the first ack from core1 causing gic_update to return
>> before updating core1.
>> >
>> It was recently discussed on a previous thread that this is a bug in the QEMU,
>> the return statement above should be a 'continue;'
>>
>> Does that solve your issue?
>>
>> -Christoffer
>
> Yes I tried that and it works, however I didn't analyse if it was correct or not.

as far as I can tell, it is correct.

> But it didn't feel right to return from a function that loops over all cores based on a state of one core.
>
Exactly, care to send a patch to qemu-devel?

-Christoffer