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Mon, 24 Feb 2025 02:18:11 -0500 Received: by mail-qt1-x832.google.com with SMTP id d75a77b69052e-472087177a5so54601101cf.2 for ; Sun, 23 Feb 2025 23:18:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1740381488; x=1740986288; darn=nongnu.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=+InCRXc+1IOh7POCVfRD3O7joLY9IeZahyz9Seq3/Yc=; b=lwoasXETD2DoNUnIi3MMhteBqtvct78sZKn68395H5/MPbwTL0zGo1uHsQxis8AKIo W9tHza3t/m4bahzVOGgragjmaDDN8aKCmNR+a+5+PZ0qa+GIyQbl89eTdd76r6dXOqrz uUNxfruW19/h9lyIdXBePmbsCg1W9W8XwUKR1hw1X+tpyKd9nmr8/rNohmMiX9d6DB80 ZvVuAPrKXbTthmTwCAESPwf9ml2FB+wAmkJOse68uzZco9okrHU2iAIw2HRPei07p+/N KR0Rb79k9mu0W+TKHIkCVjwXDxVRmscBch8MgRp70I5tnteKL7zAyAdPWZQqsrc1+ysB rIvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740381488; x=1740986288; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+InCRXc+1IOh7POCVfRD3O7joLY9IeZahyz9Seq3/Yc=; b=ldgPdnAb9XyuGY1v4PGLQG98pPsmFyJXlmmszVlBxtnjnz1iowu7Cc9v9rZS38kF+5 1HPedPFEfmXONJaJOmOAXCRJIdTKZhlulhjL1BTSVvCgBiWIrft6o9TuV+w6rwJFmAW4 d08X3qeRzmf5u6NtzjyFJSFemuqGUL54CH9VscC94e1YxBXiNbGHUYrV5SIsyfCISZtj ajp6yDbI8pb64GHJ0rZq3bXMOw660v3josztpAwAITRVdbY5SbEdE3lxB6yKs2fu3YYQ NRgDt7WQZHEFzPQU4Bvhbanf4KV8gk8w19dGi/Z5/8XE8gdnaTvBDgjz53yzAJCvv01U 1svg== X-Gm-Message-State: AOJu0Yyc2Pq7xHWFskC4q6FZJJy51MjEAyy2NZ1cKHGj8OjLSC1MUKXT LUgElBmfx8da+Fug/O3H1MMObK0/ghXXxC6RrDMbAtPEl+EKNLtyQa/1P4Va/JkBY/nC2o0oQ7P KuI1KuA9AlD4j7RiWemz0jEFQBnZOHkVcczpfHg== X-Gm-Gg: ASbGnctDEIRjpVKQ1oG7XUIthjzYCkWGfo5tfcwShiKiLV+ROwiZg8ENs+Pnf1u0Z1K vG6/aOGouurhGLvXOUUXniInczPU3QkfJNW5K9sb62/6OQ9qKq4KogysDDdrO9eX7QcSoG0fUqY 6zzBu0XrddIw== X-Google-Smtp-Source: AGHT+IHQ1Owu0CoZuyOSpo8LlUmOa37QtQTYznv2Tn2M1UXCJazBOz7X2eH6NYiz9xI0AP2m/P64CQvahhgvKGpeo+4= X-Received: by 2002:ac8:59c1:0:b0:472:6aa:d6be with SMTP id d75a77b69052e-472228cfc49mr122287381cf.17.1740381488359; Sun, 23 Feb 2025 23:18:08 -0800 (PST) MIME-Version: 1.0 References: <20250217081730.9000-1-yongxuan.wang@sifive.com> In-Reply-To: From: Yong-Xuan Wang Date: Mon, 24 Feb 2025 15:17:59 +0800 X-Gm-Features: AWEUYZndvaF1Z7BcsEcn4kW96qUzqlGu7l-WxEf1ixOnfUao7yVFJqUTucbeNqI Message-ID: Subject: Re: [PATCH 0/8] riscv: AIA: kernel-irqchip=off support To: Kashyap Chamarthy Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, greentime.hu@sifive.com, vincent.chen@sifive.com, frank.chang@sifive.com, jim.shu@sifive.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2607:f8b0:4864:20::832; envelope-from=yongxuan.wang@sifive.com; helo=mail-qt1-x832.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Kashyap, On Tue, Feb 18, 2025 at 11:53=E2=80=AFPM Kashyap Chamarthy wrote: > > On Mon, Feb 17, 2025 at 04:17:20PM +0800, Yong-Xuan Wang wrote: > > This series introduces the user-space AIA MSI emulation when using KVM > > acceleration. > > > > After this series, RISC-V QEMU virt machine with KVM acceleration has > > 3 parameters to control the type of irqchip and its emulation method: > > - Machine prop "aia" controls the type of irqchip > > - none: use PLIC and emulated in user-space > > - aplic: use AIA wired and emulated in user-space > > - aplic-imsic: use AIA MSI, emulation mode is determined by > > "kernel-irqchip" and "riscv-imsic" > > - Accel prop "kernel-irqchip", effective with AIA MSI > > - on: in-kernel APLIC and in-kernel IMSIC > > - off: user-space APLIC and user-space IMSIC > > - split: user-space APLIC and in-kernel IMSIC > > - Accel prop "kernel-irqchip", effective with in-kernel IMSIC > > - emul: use MRIF as in-kernel IMSIC > > - hw: use hardware guest IMSIC file as in-kernel IMSIC > > - auto: use the hardware guest IMSICs whenever available otherwise > > fallback to MRIF > > Hi; as someone new to the RISC-V ecosystem, most of these acronyms feel > impenetrable :-) I see they're all RISC-V interrupt-handling related > terms. I hope you don't mind my spelling them out here: > > - AIA : Advanced Interrupt Architecture > - MSI : Message Signaled Interrupts > - PLIC : Platform-Level Interrupt Controller > - APLIC : Advanced Platform Level Interrupt Controller > - IMSIC : Incoming Message Signaled Interrupt Controller > - MRIF : Message Routed Interrupt Facility > > [...] > > -- > /kashyap > Sure. I would add them into the next version. Thank you! Regards, Yong-Xuan