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Sun, 23 Feb 2025 23:56:52 -0800 (PST) MIME-Version: 1.0 References: <20250217081730.9000-1-yongxuan.wang@sifive.com> <20250217081730.9000-5-yongxuan.wang@sifive.com> <20250217-d6ff55e1f04b68643ae8295e@orel> In-Reply-To: <20250217-d6ff55e1f04b68643ae8295e@orel> From: Yong-Xuan Wang Date: Mon, 24 Feb 2025 15:56:42 +0800 X-Gm-Features: AWEUYZl7vWFacCvZDaCFyIiguvyNwOSFkPxEFvEgGamnSxOdcKOkq3qZqtfXwrk Message-ID: Subject: Re: [PATCH 4/8] target/riscv: add helper to get CSR name To: Andrew Jones Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, greentime.hu@sifive.com, vincent.chen@sifive.com, frank.chang@sifive.com, jim.shu@sifive.com, Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2607:f8b0:4864:20::82e; envelope-from=yongxuan.wang@sifive.com; helo=mail-qt1-x82e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Andrew, On Mon, Feb 17, 2025 at 10:01=E2=80=AFPM Andrew Jones wrote: > > On Mon, Feb 17, 2025 at 04:17:24PM +0800, Yong-Xuan Wang wrote: > > Add a helper function to get CSR name from CSR number. > > > > Signed-off-by: Yong-Xuan Wang > > --- > > target/riscv/cpu.h | 6 +++++- > > 1 file changed, 5 insertions(+), 1 deletion(-) > > > > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > > index 616c3bdc1c24..133d1852ee1e 100644 > > --- a/target/riscv/cpu.h > > +++ b/target/riscv/cpu.h > > @@ -920,8 +920,12 @@ extern const bool valid_vm_1_10_32[], valid_vm_1_1= 0_64[]; > > void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops); > > void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops); > > > > -void riscv_cpu_register_gdb_regs_for_features(CPUState *cs); > > +static inline const char *riscv_get_csr_name(int csr_no) > > +{ > > + return csr_ops[csr_no & (CSR_TABLE_SIZE - 1)].name; > > Shouldn't we assert csr_no is correct rather than silently > truncate it? ok. I would add some assertions in this function. Regards, Yong-Xuan > > Thanks, > drew > > > +} > > > > +void riscv_cpu_register_gdb_regs_for_features(CPUState *cs); > > target_ulong riscv_new_csr_seed(target_ulong new_value, > > target_ulong write_mask); > > > > -- > > 2.17.1 > > > >