From: Max Filippov <jcmvbkbc@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Blue Swirl <blauwirbel@gmail.com>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 6/9] target-xtensa: implement FP0 arithmetic
Date: Sun, 9 Sep 2012 16:25:41 +0400 [thread overview]
Message-ID: <CAMo8Bf+aQBGkPpS42+CWT-CLS2knA86EbFUiC5YLa3dW5SFikA@mail.gmail.com> (raw)
In-Reply-To: <CAFEAcA8XLViz2xOC7gwhOJpDgpUM055FcGxjPUqHQSXVnaW-CQ@mail.gmail.com>
On Sun, Sep 9, 2012 at 2:05 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 9 September 2012 02:29, Max Filippov <jcmvbkbc@gmail.com> wrote:
>> +float32 HELPER(abs_s)(float32 v)
>> +{
>> + return float32_abs(v);
>> +}
>> +
>> +float32 HELPER(neg_s)(float32 v)
>> +{
>> + return float32_chs(v);
>> +}
>
> Given that these are just 'v &= 0x7fffffff' and 'v ^= 0x80000000'
> it seems like it would be better to just generate code for them
> rather than calling out to a helper, though in some ways it does
> break the abstraction layer of the softfloat library. I've been
> toying with the idea of doing this for target-arm.
I doubt that these opcodes are used often enough to justify such
hack.
> (we could have gen_float32_abs() and gen_float32_chs() in
> softfloat.h, or would that be a worse layering violation in
> the other direction? I dunno.)
IMHO this approach is a bit cleaner.
--
Thanks.
-- Max
next prev parent reply other threads:[~2012-09-09 12:25 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-09 1:29 [Qemu-devel] [PATCH 0/9] target-xtensa: implement FP coprocessor option Max Filippov
2012-09-09 1:29 ` [Qemu-devel] [PATCH 1/9] softfloat: make float_muladd_negate_* flags independent Max Filippov
2012-09-09 9:24 ` Aurelien Jarno
2012-09-09 1:29 ` [Qemu-devel] [PATCH 2/9] target-xtensa: handle boolean option in overlays Max Filippov
2012-09-09 1:29 ` [Qemu-devel] [PATCH 3/9] target-xtensa: specialize softfloat NaN rules Max Filippov
2012-09-09 9:31 ` Peter Maydell
2012-09-09 12:13 ` Max Filippov
2012-09-09 15:14 ` Max Filippov
2012-09-09 15:44 ` Peter Maydell
2012-09-09 1:29 ` [Qemu-devel] [PATCH 4/9] target-xtensa: add FP registers Max Filippov
2012-09-09 1:29 ` [Qemu-devel] [PATCH 5/9] target-xtensa: implement LSCX and LSCI groups Max Filippov
2012-09-09 1:29 ` [Qemu-devel] [PATCH 6/9] target-xtensa: implement FP0 arithmetic Max Filippov
2012-09-09 10:05 ` Peter Maydell
2012-09-09 12:25 ` Max Filippov [this message]
2012-09-09 12:56 ` Peter Maydell
2012-09-09 1:29 ` [Qemu-devel] [PATCH 7/9] target-xtensa: implement FP0 conversions Max Filippov
2012-09-09 11:06 ` Peter Maydell
2012-09-09 12:41 ` Max Filippov
2012-09-09 1:29 ` [Qemu-devel] [PATCH 8/9] target-xtensa: implement FP1 group Max Filippov
2012-09-09 1:29 ` [Qemu-devel] [PATCH 9/9] target-xtensa: implement coprocessor context option Max Filippov
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