[PATCH-for-11.1 v2 0/7] monitor: Have 'info tlb' dump MMU information on monitor

[PATCH-for-11.1 v2 0/7] monitor: Have 'info tlb' dump MMU information on monitor

[Philippe Mathieu-Daudé]

Currently 'info tlb' dumps the MMU information on stdout, fix
by using the monitor console instead. Rename the dump_mmu()
functions to avoid name clash on single binary.

Since v1:
- Split Xtensa patch (pm215)
- Update m68k / ppc targets

Philippe Mathieu-Daudé (7):
  target/m68k: Have 'info tlb' dump MMU information on monitor
  target/ppc: Have 'info tlb' dump MMU information on monitor
  target/xtensa: Have 'info tlb' dump MMU information on monitor
  target/xtensa: Display [ID]TLB header within dump_tlb()
  target/m68k: Rename dump_mmu() -> m68k_monitor_dump_mmu()
  target/ppc: Rename dump_mmu() -> ppc_monitor_dump_mmu()
  target/xtensa: Rename dump_mmu() -> xtensa_monitor_dump_mmu()

 target/m68k/cpu.h          |   2 +-
 target/ppc/cpu.h           |   2 +-
 target/ppc/mmu-hash64.h    |   2 +-
 target/xtensa/cpu.h        |   2 +-
 target/m68k/helper.c       | 116 +++++++++++++++++++------------------
 target/m68k/monitor.c      |   2 +-
 target/ppc/mmu-hash64.c    |  10 ++--
 target/ppc/mmu_common.c    |  66 ++++++++++-----------
 target/ppc/monitor.c       |   2 +-
 target/xtensa/mmu_helper.c |  44 +++++++-------
 target/xtensa/monitor.c    |   2 +-
 11 files changed, 125 insertions(+), 125 deletions(-)

-- 
2.53.0

[PATCH-for-11.1 v2 1/7] target/m68k: Have 'info tlb' dump MMU information on monitor

[Philippe Mathieu-Daudé]

Currently 'info tlb' dumps the MMU information on stdout.
Propagate the @Monitor argument and replace qemu_printf() by
monitor_printf() -- or monitor_puts when no formatting -- to
dump information over the monitor (which is not always stdout).

Fixes: 2097dca6d3a ("target/m68k: add HMP command "info tlb"")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/m68k/cpu.h     |   2 +-
 target/m68k/helper.c  | 116 +++++++++++++++++++++---------------------
 target/m68k/monitor.c |   2 +-
 3 files changed, 61 insertions(+), 59 deletions(-)

diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index d7f508a9e80..84ffebe3890 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -606,6 +606,6 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
 #define TB_FLAGS_TRACE          16
 #define TB_FLAGS_TRACE_BIT      (1 << TB_FLAGS_TRACE)
 
-void dump_mmu(CPUM68KState *env);
+void dump_mmu(Monitor *mon, CPUM68KState *env);
 
 #endif
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 9bab1843892..2208b9a2ab9 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -28,7 +28,7 @@
 #include "system/memory.h"
 #include "gdbstub/helpers.h"
 #include "fpu/softfloat.h"
-#include "qemu/qemu-print.h"
+#include "monitor/monitor.h"
 
 #define SIGNBIT (1u << 31)
 
@@ -459,28 +459,30 @@ void m68k_switch_sp(CPUM68KState *env)
 #if !defined(CONFIG_USER_ONLY)
 /* MMU: 68040 only */
 
-static void print_address_zone(uint32_t logical, uint32_t physical,
+static void print_address_zone(Monitor *mon,
+                               uint32_t logical, uint32_t physical,
                                uint32_t size, int attr)
 {
-    qemu_printf("%08x - %08x -> %08x - %08x %c ",
+    monitor_printf(mon, "%08x - %08x -> %08x - %08x %c ",
                 logical, logical + size - 1,
                 physical, physical + size - 1,
                 attr & 4 ? 'W' : '-');
     size >>= 10;
     if (size < 1024) {
-        qemu_printf("(%d KiB)\n", size);
+        monitor_printf(mon, "(%d KiB)\n", size);
     } else {
         size >>= 10;
         if (size < 1024) {
-            qemu_printf("(%d MiB)\n", size);
+            monitor_printf(mon, "(%d MiB)\n", size);
         } else {
             size >>= 10;
-            qemu_printf("(%d GiB)\n", size);
+            monitor_printf(mon, "(%d GiB)\n", size);
         }
     }
 }
 
-static void dump_address_map(CPUM68KState *env, uint32_t root_pointer)
+static void dump_address_map(Monitor *mon, CPUM68KState *env,
+                             uint32_t root_pointer)
 {
     int tic_size, tic_shift;
     uint32_t tib_mask;
@@ -548,7 +550,7 @@ static void dump_address_map(CPUM68KState *env, uint32_t root_pointer)
                     if (first_logical != 0xffffffff) {
                         size = last_logical + (1 << tic_shift) -
                                first_logical;
-                        print_address_zone(first_logical,
+                        print_address_zone(mon, first_logical,
                                            first_physical, size, last_attr);
                     }
                     first_logical = logical;
@@ -559,125 +561,125 @@ static void dump_address_map(CPUM68KState *env, uint32_t root_pointer)
     }
     if (first_logical != logical || (attr & 4) != (last_attr & 4)) {
         size = logical + (1 << tic_shift) - first_logical;
-        print_address_zone(first_logical, first_physical, size, last_attr);
+        print_address_zone(mon, first_logical, first_physical, size, last_attr);
     }
 }
 
 #define DUMP_CACHEFLAGS(a) \
     switch (a & M68K_DESC_CACHEMODE) { \
     case M68K_DESC_CM_WRTHRU: /* cacheable, write-through */ \
-        qemu_printf("T"); \
+        monitor_puts(mon, "T"); \
         break; \
     case M68K_DESC_CM_COPYBK: /* cacheable, copyback */ \
-        qemu_printf("C"); \
+        monitor_puts(mon, "C"); \
         break; \
     case M68K_DESC_CM_SERIAL: /* noncachable, serialized */ \
-        qemu_printf("S"); \
+        monitor_puts(mon, "S"); \
         break; \
     case M68K_DESC_CM_NCACHE: /* noncachable */ \
-        qemu_printf("N"); \
+        monitor_puts(mon, "N"); \
         break; \
     }
 
-static void dump_ttr(uint32_t ttr)
+static void dump_ttr(Monitor *mon, uint32_t ttr)
 {
     if ((ttr & M68K_TTR_ENABLED) == 0) {
-        qemu_printf("disabled\n");
+        monitor_puts(mon, "disabled\n");
         return;
     }
-    qemu_printf("Base: 0x%08x Mask: 0x%08x Control: ",
+    monitor_printf(mon, "Base: 0x%08x Mask: 0x%08x Control: ",
                 ttr & M68K_TTR_ADDR_BASE,
                 (ttr & M68K_TTR_ADDR_MASK) << M68K_TTR_ADDR_MASK_SHIFT);
     switch (ttr & M68K_TTR_SFIELD) {
     case M68K_TTR_SFIELD_USER:
-        qemu_printf("U");
+        monitor_puts(mon, "U");
         break;
     case M68K_TTR_SFIELD_SUPER:
-        qemu_printf("S");
+        monitor_puts(mon, "S");
         break;
     default:
-        qemu_printf("*");
+        monitor_puts(mon, "*");
         break;
     }
     DUMP_CACHEFLAGS(ttr);
     if (ttr & M68K_DESC_WRITEPROT) {
-        qemu_printf("R");
+        monitor_puts(mon, "R");
     } else {
-        qemu_printf("W");
+        monitor_puts(mon, "W");
     }
-    qemu_printf(" U: %d\n", (ttr & M68K_DESC_USERATTR) >>
+    monitor_printf(mon, " U: %d\n", (ttr & M68K_DESC_USERATTR) >>
                                M68K_DESC_USERATTR_SHIFT);
 }
 
-void dump_mmu(CPUM68KState *env)
+void dump_mmu(Monitor *mon, CPUM68KState *env)
 {
     if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) {
-        qemu_printf("Translation disabled\n");
+        monitor_puts(mon, "Translation disabled\n");
         return;
     }
-    qemu_printf("Page Size: ");
+    monitor_puts(mon, "Page Size: ");
     if (env->mmu.tcr & M68K_TCR_PAGE_8K) {
-        qemu_printf("8kB\n");
+        monitor_puts(mon, "8kB\n");
     } else {
-        qemu_printf("4kB\n");
+        monitor_puts(mon, "4kB\n");
     }
 
-    qemu_printf("MMUSR: ");
+    monitor_puts(mon, "MMUSR: ");
     if (env->mmu.mmusr & M68K_MMU_B_040) {
-        qemu_printf("BUS ERROR\n");
+        monitor_puts(mon, "BUS ERROR\n");
     } else {
-        qemu_printf("Phy=%08x Flags: ", env->mmu.mmusr & 0xfffff000);
+        monitor_printf(mon, "Phy=%08x Flags: ", env->mmu.mmusr & 0xfffff000);
         /* flags found on the page descriptor */
         if (env->mmu.mmusr & M68K_MMU_G_040) {
-            qemu_printf("G"); /* Global */
+            monitor_puts(mon, "G"); /* Global */
         } else {
-            qemu_printf(".");
+            monitor_puts(mon, ".");
         }
         if (env->mmu.mmusr & M68K_MMU_S_040) {
-            qemu_printf("S"); /* Supervisor */
+            monitor_puts(mon, "S"); /* Supervisor */
         } else {
-            qemu_printf(".");
+            monitor_puts(mon, ".");
         }
         if (env->mmu.mmusr & M68K_MMU_M_040) {
-            qemu_printf("M"); /* Modified */
+            monitor_puts(mon, "M"); /* Modified */
         } else {
-            qemu_printf(".");
+            monitor_puts(mon, ".");
         }
         if (env->mmu.mmusr & M68K_MMU_WP_040) {
-            qemu_printf("W"); /* Write protect */
+            monitor_puts(mon, "W"); /* Write protect */
         } else {
-            qemu_printf(".");
+            monitor_puts(mon, ".");
         }
         if (env->mmu.mmusr & M68K_MMU_T_040) {
-            qemu_printf("T"); /* Transparent */
+            monitor_puts(mon, "T"); /* Transparent */
         } else {
-            qemu_printf(".");
+            monitor_puts(mon, ".");
         }
         if (env->mmu.mmusr & M68K_MMU_R_040) {
-            qemu_printf("R"); /* Resident */
+            monitor_puts(mon, "R"); /* Resident */
         } else {
-            qemu_printf(".");
+            monitor_puts(mon, ".");
         }
-        qemu_printf(" Cache: ");
+        monitor_puts(mon, " Cache: ");
         DUMP_CACHEFLAGS(env->mmu.mmusr);
-        qemu_printf(" U: %d\n", (env->mmu.mmusr >> 8) & 3);
-        qemu_printf("\n");
+        monitor_printf(mon, " U: %d\n", (env->mmu.mmusr >> 8) & 3);
+        monitor_puts(mon, "\n");
     }
 
-    qemu_printf("ITTR0: ");
-    dump_ttr(env->mmu.ttr[M68K_ITTR0]);
-    qemu_printf("ITTR1: ");
-    dump_ttr(env->mmu.ttr[M68K_ITTR1]);
-    qemu_printf("DTTR0: ");
-    dump_ttr(env->mmu.ttr[M68K_DTTR0]);
-    qemu_printf("DTTR1: ");
-    dump_ttr(env->mmu.ttr[M68K_DTTR1]);
+    monitor_puts(mon, "ITTR0: ");
+    dump_ttr(mon, env->mmu.ttr[M68K_ITTR0]);
+    monitor_puts(mon, "ITTR1: ");
+    dump_ttr(mon, env->mmu.ttr[M68K_ITTR1]);
+    monitor_puts(mon, "DTTR0: ");
+    dump_ttr(mon, env->mmu.ttr[M68K_DTTR0]);
+    monitor_puts(mon, "DTTR1: ");
+    dump_ttr(mon, env->mmu.ttr[M68K_DTTR1]);
 
-    qemu_printf("SRP: 0x%08x\n", env->mmu.srp);
-    dump_address_map(env, env->mmu.srp);
+    monitor_printf(mon, "SRP: 0x%08x\n", env->mmu.srp);
+    dump_address_map(mon, env, env->mmu.srp);
 
-    qemu_printf("URP: 0x%08x\n", env->mmu.urp);
-    dump_address_map(env, env->mmu.urp);
+    monitor_printf(mon, "URP: 0x%08x\n", env->mmu.urp);
+    dump_address_map(mon, env, env->mmu.urp);
 }
 
 static int check_TTR(uint32_t ttr, int *prot, target_ulong addr,
diff --git a/target/m68k/monitor.c b/target/m68k/monitor.c
index be7411edca6..38f925e5b16 100644
--- a/target/m68k/monitor.c
+++ b/target/m68k/monitor.c
@@ -19,7 +19,7 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
         return;
     }
 
-    dump_mmu(env1);
+    dump_mmu(mon, env1);
 }
 
 static const MonitorDef monitor_defs[] = {
-- 
2.53.0

[PATCH-for-11.1 v2 2/7] target/ppc: Have 'info tlb' dump MMU information on monitor

[Philippe Mathieu-Daudé]

Currently 'info tlb' dumps the MMU information on stdout.
Propagate the @Monitor argument and replace qemu_printf() by
monitor_printf() -- or monitor_puts when no formatting -- to
dump information over the monitor (which is not always stdout).

Fixes: bebabbc7aa7 ("ppc: booke206: add "info tlb" support")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/ppc/cpu.h        |  2 +-
 target/ppc/mmu-hash64.h |  2 +-
 target/ppc/mmu-hash64.c | 10 +++----
 target/ppc/mmu_common.c | 66 ++++++++++++++++++++---------------------
 target/ppc/monitor.c    |  2 +-
 5 files changed, 41 insertions(+), 41 deletions(-)

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 296e7604077..ba17ea83fa2 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -3082,7 +3082,7 @@ static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv)
 }
 #endif
 
-void dump_mmu(CPUPPCState *env);
+void dump_mmu(Monitor *mon, CPUPPCState *env);
 
 void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);
 void ppc_store_vscr(CPUPPCState *env, uint32_t vscr);
diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h
index ae8d4b37aed..9ce6939191a 100644
--- a/target/ppc/mmu-hash64.h
+++ b/target/ppc/mmu-hash64.h
@@ -4,7 +4,7 @@
 #ifndef CONFIG_USER_ONLY
 
 #ifdef TARGET_PPC64
-void dump_slb(PowerPCCPU *cpu);
+void dump_slb(Monitor *mon, PowerPCCPU *cpu);
 int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot,
                   target_ulong esid, target_ulong vsid);
 bool ppc_hash64_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index 2c33d98001d..356aee0c92c 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -23,7 +23,6 @@
 #include "exec/page-protection.h"
 #include "exec/target_page.h"
 #include "qemu/error-report.h"
-#include "qemu/qemu-print.h"
 #include "system/hw_accel.h"
 #include "system/memory.h"
 #include "kvm_ppc.h"
@@ -34,6 +33,7 @@
 #include "mmu-book3s-v3.h"
 #include "mmu-books.h"
 #include "helper_regs.h"
+#include "monitor/monitor.h"
 
 #ifdef CONFIG_TCG
 #include "exec/helper-proto.h"
@@ -83,7 +83,7 @@ static ppc_slb_t *slb_lookup(PowerPCCPU *cpu, target_ulong eaddr)
     return NULL;
 }
 
-void dump_slb(PowerPCCPU *cpu)
+void dump_slb(Monitor *mon, PowerPCCPU *cpu)
 {
     CPUPPCState *env = &cpu->env;
     int i;
@@ -91,15 +91,15 @@ void dump_slb(PowerPCCPU *cpu)
 
     cpu_synchronize_state(CPU(cpu));
 
-    qemu_printf("SLB\tESID\t\t\tVSID\n");
+    monitor_puts(mon, "SLB\tESID\t\t\tVSID\n");
     for (i = 0; i < cpu->hash64_opts->slb_size; i++) {
         slbe = env->slb[i].esid;
         slbv = env->slb[i].vsid;
         if (slbe == 0 && slbv == 0) {
             continue;
         }
-        qemu_printf("%d\t0x%016" PRIx64 "\t0x%016" PRIx64 "\n",
-                    i, slbe, slbv);
+        monitor_printf(mon, "%d\t0x%016" PRIx64 "\t0x%016" PRIx64 "\n",
+                       i, slbe, slbv);
     }
 }
 
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 52d48615ac2..5ea9b6d6773 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -29,11 +29,11 @@
 #include "exec/log.h"
 #include "helper_regs.h"
 #include "qemu/error-report.h"
-#include "qemu/qemu-print.h"
 #include "internal.h"
 #include "mmu-book3s-v3.h"
 #include "mmu-radix64.h"
 #include "mmu-booke.h"
+#include "monitor/monitor.h"
 
 /* #define DUMP_PAGE_TABLES */
 
@@ -349,20 +349,20 @@ static const char *book3e_tsize_to_str[32] = {
     "1T", "2T"
 };
 
-static void mmubooke_dump_mmu(CPUPPCState *env)
+static void mmubooke_dump_mmu(Monitor *mon, CPUPPCState *env)
 {
     ppcemb_tlb_t *entry;
     int i;
 
 #ifdef CONFIG_KVM
     if (kvm_enabled() && !env->kvm_sw_tlb) {
-        qemu_printf("Cannot access KVM TLB\n");
+        monitor_puts(mon, "Cannot access KVM TLB\n");
         return;
     }
 #endif
 
-    qemu_printf("\nTLB:\n");
-    qemu_printf("Effective          Physical           Size PID   Prot     "
+    monitor_puts(mon, "\nTLB:\n");
+    monitor_puts(mon, "Effective          Physical           Size PID   Prot     "
                 "Attr\n");
 
     entry = &env->tlb.tlbe[0];
@@ -387,21 +387,21 @@ static void mmubooke_dump_mmu(CPUPPCState *env)
         } else {
             snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "k", size / KiB);
         }
-        qemu_printf("0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %08x\n",
+        monitor_printf(mon, "0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %08x\n",
                     (uint64_t)ea, (uint64_t)pa, size_buf, (uint32_t)entry->PID,
                     entry->prot, entry->attr);
     }
 
 }
 
-static void mmubooke206_dump_one_tlb(CPUPPCState *env, int tlbn, int offset,
-                                     int tlbsize)
+static void mmubooke206_dump_one_tlb(Monitor *mon, CPUPPCState *env,
+                                     int tlbn, int offset, int tlbsize)
 {
     ppcmas_tlb_t *entry;
     int i;
 
-    qemu_printf("\nTLB%d:\n", tlbn);
-    qemu_printf("Effective          Physical           Size TID   TS SRWX"
+    monitor_printf(mon, "\nTLB%d:\n", tlbn);
+    monitor_puts(mon, "Effective          Physical           Size TID   TS SRWX"
                 " URWX WIMGE U0123\n");
 
     entry = &env->tlb.tlbm[offset];
@@ -418,7 +418,7 @@ static void mmubooke206_dump_one_tlb(CPUPPCState *env, int tlbn, int offset,
         ea = entry->mas2 & ~(size - 1);
         pa = entry->mas7_3 & ~(size - 1);
 
-        qemu_printf("0x%016" PRIx64 " 0x%016" PRIx64 " %4s %-5u %1u  S%c%c%c"
+        monitor_printf(mon, "0x%016" PRIx64 " 0x%016" PRIx64 " %4s %-5u %1u  S%c%c%c"
                     " U%c%c%c %c%c%c%c%c U%c%c%c%c\n",
                     (uint64_t)ea, (uint64_t)pa,
                     book3e_tsize_to_str[tsize],
@@ -442,14 +442,14 @@ static void mmubooke206_dump_one_tlb(CPUPPCState *env, int tlbn, int offset,
     }
 }
 
-static void mmubooke206_dump_mmu(CPUPPCState *env)
+static void mmubooke206_dump_mmu(Monitor *mon, CPUPPCState *env)
 {
     int offset = 0;
     int i;
 
 #ifdef CONFIG_KVM
     if (kvm_enabled() && !env->kvm_sw_tlb) {
-        qemu_printf("Cannot access KVM TLB\n");
+        monitor_puts(mon, "Cannot access KVM TLB\n");
         return;
     }
 #endif
@@ -461,12 +461,12 @@ static void mmubooke206_dump_mmu(CPUPPCState *env)
             continue;
         }
 
-        mmubooke206_dump_one_tlb(env, i, offset, size);
+        mmubooke206_dump_one_tlb(mon, env, i, offset, size);
         offset += size;
     }
 }
 
-static void mmu6xx_dump_BATs(CPUPPCState *env, int type)
+static void mmu6xx_dump_BATs(Monitor *mon, CPUPPCState *env, int type)
 {
     target_ulong *BATlt, *BATut, *BATu, *BATl;
     target_ulong BEPIl, BEPIu, bl;
@@ -489,7 +489,7 @@ static void mmu6xx_dump_BATs(CPUPPCState *env, int type)
         BEPIu = *BATu & BATU32_BEPIU;
         BEPIl = *BATu & BATU32_BEPIL;
         bl = (*BATu & BATU32_BL) << 15;
-        qemu_printf("%s BAT%d BATu " TARGET_FMT_lx
+        monitor_printf(mon, "%s BAT%d BATu " TARGET_FMT_lx
                     " BATl " TARGET_FMT_lx "\n\t" TARGET_FMT_lx " "
                     TARGET_FMT_lx " " TARGET_FMT_lx "\n",
                     type == ACCESS_CODE ? "code" : "data", i,
@@ -497,38 +497,38 @@ static void mmu6xx_dump_BATs(CPUPPCState *env, int type)
     }
 }
 
-static void mmu6xx_dump_mmu(CPUPPCState *env)
+static void mmu6xx_dump_mmu(Monitor *mon, CPUPPCState *env)
 {
     PowerPCCPU *cpu = env_archcpu(env);
     ppc6xx_tlb_t *tlb;
     target_ulong sr;
     int type, way, entry, i;
 
-    qemu_printf("HTAB base = 0x%"HWADDR_PRIx"\n", ppc_hash32_hpt_base(cpu));
-    qemu_printf("HTAB mask = 0x%"HWADDR_PRIx"\n", ppc_hash32_hpt_mask(cpu));
+    monitor_printf(mon, "HTAB base = 0x%"HWADDR_PRIx"\n", ppc_hash32_hpt_base(cpu));
+    monitor_printf(mon, "HTAB mask = 0x%"HWADDR_PRIx"\n", ppc_hash32_hpt_mask(cpu));
 
-    qemu_printf("\nSegment registers:\n");
+    monitor_puts(mon, "\nSegment registers:\n");
     for (i = 0; i < 32; i++) {
         sr = env->sr[i];
         if (sr & 0x80000000) {
-            qemu_printf("%02d T=%d Ks=%d Kp=%d BUID=0x%03x "
+            monitor_printf(mon, "%02d T=%d Ks=%d Kp=%d BUID=0x%03x "
                         "CNTLR_SPEC=0x%05x\n", i,
                         sr & 0x80000000 ? 1 : 0, sr & 0x40000000 ? 1 : 0,
                         sr & 0x20000000 ? 1 : 0, (uint32_t)((sr >> 20) & 0x1FF),
                         (uint32_t)(sr & 0xFFFFF));
         } else {
-            qemu_printf("%02d T=%d Ks=%d Kp=%d N=%d VSID=0x%06x\n", i,
+            monitor_printf(mon, "%02d T=%d Ks=%d Kp=%d N=%d VSID=0x%06x\n", i,
                         sr & 0x80000000 ? 1 : 0, sr & 0x40000000 ? 1 : 0,
                         sr & 0x20000000 ? 1 : 0, sr & 0x10000000 ? 1 : 0,
                         (uint32_t)(sr & 0x00FFFFFF));
         }
     }
 
-    qemu_printf("\nBATs:\n");
-    mmu6xx_dump_BATs(env, ACCESS_INT);
-    mmu6xx_dump_BATs(env, ACCESS_CODE);
+    monitor_puts(mon, "\nBATs:\n");
+    mmu6xx_dump_BATs(mon, env, ACCESS_INT);
+    mmu6xx_dump_BATs(mon, env, ACCESS_CODE);
 
-    qemu_printf("\nTLBs                       [EPN    EPN + SIZE]\n");
+    monitor_puts(mon, "\nTLBs                       [EPN    EPN + SIZE]\n");
     for (type = 0; type < 2; type++) {
         for (way = 0; way < env->nb_ways; way++) {
             for (entry = env->nb_tlb * type + env->tlb_per_way * way;
@@ -536,7 +536,7 @@ static void mmu6xx_dump_mmu(CPUPPCState *env)
                  entry++) {
 
                 tlb = &env->tlb.tlb6[entry];
-                qemu_printf("%s TLB %02d/%02d way:%d %s ["
+                monitor_printf(mon, "%s TLB %02d/%02d way:%d %s ["
                             TARGET_FMT_lx " " TARGET_FMT_lx "]\n",
                             type ? "code" : "data", entry % env->nb_tlb,
                             env->nb_tlb, way,
@@ -547,31 +547,31 @@ static void mmu6xx_dump_mmu(CPUPPCState *env)
     }
 }
 
-void dump_mmu(CPUPPCState *env)
+void dump_mmu(Monitor *mon, CPUPPCState *env)
 {
     switch (env->mmu_model) {
     case POWERPC_MMU_BOOKE:
-        mmubooke_dump_mmu(env);
+        mmubooke_dump_mmu(mon, env);
         break;
     case POWERPC_MMU_BOOKE206:
-        mmubooke206_dump_mmu(env);
+        mmubooke206_dump_mmu(mon, env);
         break;
     case POWERPC_MMU_SOFT_6xx:
-        mmu6xx_dump_mmu(env);
+        mmu6xx_dump_mmu(mon, env);
         break;
 #if defined(TARGET_PPC64)
     case POWERPC_MMU_64B:
     case POWERPC_MMU_2_03:
     case POWERPC_MMU_2_06:
     case POWERPC_MMU_2_07:
-        dump_slb(env_archcpu(env));
+        dump_slb(mon, env_archcpu(env));
         break;
     case POWERPC_MMU_3_00:
         if (ppc64_v3_radix(env_archcpu(env))) {
             qemu_log_mask(LOG_UNIMP, "%s: the PPC64 MMU is unsupported\n",
                           __func__);
         } else {
-            dump_slb(env_archcpu(env));
+            dump_slb(mon, env_archcpu(env));
         }
         break;
 #endif
diff --git a/target/ppc/monitor.c b/target/ppc/monitor.c
index 7c88e0e2bda..41337d77a89 100644
--- a/target/ppc/monitor.c
+++ b/target/ppc/monitor.c
@@ -19,5 +19,5 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
         monitor_printf(mon, "No CPU available\n");
         return;
     }
-    dump_mmu(env1);
+    dump_mmu(mon, env1);
 }
-- 
2.53.0

[PATCH-for-11.1 v2 3/7] target/xtensa: Have 'info tlb' dump MMU information on monitor

[Philippe Mathieu-Daudé]

Currently 'info tlb' dumps the MMU information on stdout.
Propagate the @Monitor argument and replace qemu_printf() by
monitor_printf() -- or monitor_puts when no formatting -- to
dump information over the monitor (which is not always stdout).

Fixes: d41160a3e64 ("Sparc: implement monitor command 'info tlb'")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/xtensa/cpu.h        |  2 +-
 target/xtensa/mmu_helper.c | 44 +++++++++++++++++++-------------------
 target/xtensa/monitor.c    |  2 +-
 3 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index dfd2ceab7cf..caec22bb742 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -693,7 +693,7 @@ int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb,
         uint32_t vaddr, int is_write, int mmu_idx,
         uint32_t *paddr, uint32_t *page_size, unsigned *access);
 void reset_mmu(CPUXtensaState *env);
-void dump_mmu(CPUXtensaState *env);
+void dump_mmu(Monitor *mon, CPUXtensaState *env);
 
 static inline MemoryRegion *xtensa_get_er_region(CPUXtensaState *env)
 {
diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c
index 71330fc84b9..9dbf671228b 100644
--- a/target/xtensa/mmu_helper.c
+++ b/target/xtensa/mmu_helper.c
@@ -27,7 +27,6 @@
 
 #include "qemu/osdep.h"
 #include "qemu/log.h"
-#include "qemu/qemu-print.h"
 #include "qemu/units.h"
 #include "cpu.h"
 #include "exec/helper-proto.h"
@@ -38,6 +37,7 @@
 #include "exec/page-protection.h"
 #include "exec/target_page.h"
 #include "system/memory.h"
+#include "monitor/monitor.h"
 
 #define XTENSA_MPU_SEGMENT_MASK 0x0000001f
 #define XTENSA_MPU_ACC_RIGHTS_MASK 0x00000f00
@@ -1082,7 +1082,7 @@ int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb,
     }
 }
 
-static void dump_tlb(CPUXtensaState *env, bool dtlb)
+static void dump_tlb(Monitor *mon, CPUXtensaState *env, bool dtlb)
 {
     unsigned wi, ei;
     const xtensa_tlb *conf =
@@ -1121,11 +1121,11 @@ static void dump_tlb(CPUXtensaState *env, bool dtlb)
 
                 if (print_header) {
                     print_header = false;
-                    qemu_printf("Way %u (%d %s)\n", wi, sz, sz_text);
-                    qemu_printf("\tVaddr       Paddr       ASID  Attr RWX Cache\n"
+                    monitor_printf(mon, "Way %u (%d %s)\n", wi, sz, sz_text);
+                    monitor_puts(mon, "\tVaddr       Paddr       ASID  Attr RWX Cache\n"
                                 "\t----------  ----------  ----  ---- --- -------\n");
                 }
-                qemu_printf("\t0x%08x  0x%08x  0x%02x  0x%02x %c%c%c %s\n",
+                monitor_printf(mon, "\t0x%08x  0x%08x  0x%02x  0x%02x %c%c%c %s\n",
                             entry->vaddr,
                             entry->paddr,
                             entry->asid,
@@ -1140,12 +1140,12 @@ static void dump_tlb(CPUXtensaState *env, bool dtlb)
     }
 }
 
-static void dump_mpu(CPUXtensaState *env,
+static void dump_mpu(Monitor *mon, CPUXtensaState *env,
                      const xtensa_mpu_entry *entry, unsigned n)
 {
     unsigned i;
 
-    qemu_printf("\t%s  Vaddr       Attr        Ring0  Ring1  System Type    CPU cache\n"
+    monitor_printf(mon, "\t%s  Vaddr       Attr        Ring0  Ring1  System Type    CPU cache\n"
                 "\t%s  ----------  ----------  -----  -----  -------------  ---------\n",
                 env ? "En" : "  ",
                 env ? "--" : "  ");
@@ -1157,7 +1157,7 @@ static void dump_mpu(CPUXtensaState *env,
         unsigned type = mpu_attr_to_type(attr);
         char cpu_cache = (type & XTENSA_MPU_TYPE_CPU_CACHE) ? '-' : ' ';
 
-        qemu_printf("\t %c  0x%08x  0x%08x   %c%c%c    %c%c%c   ",
+        monitor_printf(mon, "\t %c  0x%08x  0x%08x   %c%c%c    %c%c%c   ",
                     env ?
                     ((env->sregs[MPUENB] & (1u << i)) ? '+' : '-') : ' ',
                     entry[i].vaddr, attr,
@@ -1170,19 +1170,19 @@ static void dump_mpu(CPUXtensaState *env,
 
         switch (type & XTENSA_MPU_SYSTEM_TYPE_MASK) {
         case XTENSA_MPU_SYSTEM_TYPE_DEVICE:
-            qemu_printf("Device %cB %3s\n",
+            monitor_printf(mon, "Device %cB %3s\n",
                         (type & XTENSA_MPU_TYPE_B) ? ' ' : 'n',
                         (type & XTENSA_MPU_TYPE_INT) ? "int" : "");
             break;
         case XTENSA_MPU_SYSTEM_TYPE_NC:
-            qemu_printf("Sys NC %cB      %c%c%c\n",
+            monitor_printf(mon, "Sys NC %cB      %c%c%c\n",
                         (type & XTENSA_MPU_TYPE_B) ? ' ' : 'n',
                         (type & XTENSA_MPU_TYPE_CPU_R) ? 'r' : cpu_cache,
                         (type & XTENSA_MPU_TYPE_CPU_W) ? 'w' : cpu_cache,
                         (type & XTENSA_MPU_TYPE_CPU_C) ? 'c' : cpu_cache);
             break;
         case XTENSA_MPU_SYSTEM_TYPE_C:
-            qemu_printf("Sys  C %c%c%c     %c%c%c\n",
+            monitor_printf(mon, "Sys  C %c%c%c     %c%c%c\n",
                         (type & XTENSA_MPU_TYPE_SYS_R) ? 'R' : '-',
                         (type & XTENSA_MPU_TYPE_SYS_W) ? 'W' : '-',
                         (type & XTENSA_MPU_TYPE_SYS_C) ? 'C' : '-',
@@ -1191,29 +1191,29 @@ static void dump_mpu(CPUXtensaState *env,
                         (type & XTENSA_MPU_TYPE_CPU_C) ? 'c' : cpu_cache);
             break;
         default:
-            qemu_printf("Unknown\n");
+            monitor_puts(mon, "Unknown\n");
             break;
         }
     }
 }
 
-void dump_mmu(CPUXtensaState *env)
+void dump_mmu(Monitor *mon, CPUXtensaState *env)
 {
     if (xtensa_option_bits_enabled(env->config,
                 XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
                 XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION) |
                 XTENSA_OPTION_BIT(XTENSA_OPTION_MMU))) {
 
-        qemu_printf("ITLB:\n");
-        dump_tlb(env, false);
-        qemu_printf("\nDTLB:\n");
-        dump_tlb(env, true);
+        monitor_puts(mon, "ITLB:\n");
+        dump_tlb(mon, env, false);
+        monitor_puts(mon, "\nDTLB:\n");
+        dump_tlb(mon, env, true);
     } else if (xtensa_option_enabled(env->config, XTENSA_OPTION_MPU)) {
-        qemu_printf("Foreground map:\n");
-        dump_mpu(env, env->mpu_fg, env->config->n_mpu_fg_segments);
-        qemu_printf("\nBackground map:\n");
-        dump_mpu(NULL, env->config->mpu_bg, env->config->n_mpu_bg_segments);
+        monitor_puts(mon, "Foreground map:\n");
+        dump_mpu(mon, env, env->mpu_fg, env->config->n_mpu_fg_segments);
+        monitor_puts(mon, "\nBackground map:\n");
+        dump_mpu(mon, NULL, env->config->mpu_bg, env->config->n_mpu_bg_segments);
     } else {
-        qemu_printf("No TLB for this CPU core\n");
+        monitor_puts(mon, "No TLB for this CPU core\n");
     }
 }
diff --git a/target/xtensa/monitor.c b/target/xtensa/monitor.c
index 2af84934f83..2761735f112 100644
--- a/target/xtensa/monitor.c
+++ b/target/xtensa/monitor.c
@@ -34,5 +34,5 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
         monitor_printf(mon, "No CPU available\n");
         return;
     }
-    dump_mmu(env1);
+    dump_mmu(mon, env1);
 }
-- 
2.53.0

[PATCH-for-11.1 v2 4/7] target/xtensa: Display [ID]TLB header within dump_tlb()

[Philippe Mathieu-Daudé]

Move common code from caller to callee.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/xtensa/mmu_helper.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c
index 9dbf671228b..48e1d64a3d7 100644
--- a/target/xtensa/mmu_helper.c
+++ b/target/xtensa/mmu_helper.c
@@ -1091,6 +1091,7 @@ static void dump_tlb(Monitor *mon, CPUXtensaState *env, bool dtlb)
         xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) ?
         mmu_attr_to_access : region_attr_to_access;
 
+    monitor_printf(mon, "\n%cTLB:\n", dtlb ? 'D' : 'I');
     for (wi = 0; wi < conf->nways; ++wi) {
         uint32_t sz = ~xtensa_tlb_get_addr_mask(env, dtlb, wi) + 1;
         const char *sz_text;
@@ -1203,10 +1204,7 @@ void dump_mmu(Monitor *mon, CPUXtensaState *env)
                 XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
                 XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION) |
                 XTENSA_OPTION_BIT(XTENSA_OPTION_MMU))) {
-
-        monitor_puts(mon, "ITLB:\n");
         dump_tlb(mon, env, false);
-        monitor_puts(mon, "\nDTLB:\n");
         dump_tlb(mon, env, true);
     } else if (xtensa_option_enabled(env->config, XTENSA_OPTION_MPU)) {
         monitor_puts(mon, "Foreground map:\n");
-- 
2.53.0

[PATCH-for-11.1 v2 5/7] target/m68k: Rename dump_mmu() -> m68k_monitor_dump_mmu()

[Philippe Mathieu-Daudé]

Rename dump_mmu() to avoid a name clash with other targets:

  $ git grep -w dump_mmu master | fgrep .h
  target/m68k/cpu.h:610:void dump_mmu(CPUM68KState *env);
  target/ppc/cpu.h:3083:void dump_mmu(CPUPPCState *env);
  target/sparc/cpu.h:603:void dump_mmu(CPUSPARCState *env);
  target/xtensa/cpu.h:697:void dump_mmu(CPUXtensaState *env);

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/m68k/cpu.h     | 2 +-
 target/m68k/helper.c  | 2 +-
 target/m68k/monitor.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 84ffebe3890..5c45597375c 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -606,6 +606,6 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
 #define TB_FLAGS_TRACE          16
 #define TB_FLAGS_TRACE_BIT      (1 << TB_FLAGS_TRACE)
 
-void dump_mmu(Monitor *mon, CPUM68KState *env);
+void m68k_monitor_dump_mmu(Monitor *mon, CPUM68KState *env);
 
 #endif
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 2208b9a2ab9..7cdea555061 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -611,7 +611,7 @@ static void dump_ttr(Monitor *mon, uint32_t ttr)
                                M68K_DESC_USERATTR_SHIFT);
 }
 
-void dump_mmu(Monitor *mon, CPUM68KState *env)
+void m68k_monitor_dump_mmu(Monitor *mon, CPUM68KState *env)
 {
     if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) {
         monitor_puts(mon, "Translation disabled\n");
diff --git a/target/m68k/monitor.c b/target/m68k/monitor.c
index 38f925e5b16..eea5ae16a90 100644
--- a/target/m68k/monitor.c
+++ b/target/m68k/monitor.c
@@ -19,7 +19,7 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
         return;
     }
 
-    dump_mmu(mon, env1);
+    m68k_monitor_dump_mmu(mon, env1);
 }
 
 static const MonitorDef monitor_defs[] = {
-- 
2.53.0

[PATCH-for-11.1 v2 6/7] target/ppc: Rename dump_mmu() -> ppc_monitor_dump_mmu()

[Philippe Mathieu-Daudé]

Rename dump_mmu() to avoid a name clash with other targets:

  $ git grep -w dump_mmu master | fgrep .h
  target/m68k/cpu.h:610:void dump_mmu(CPUM68KState *env);
  target/ppc/cpu.h:3083:void dump_mmu(CPUPPCState *env);
  target/sparc/cpu.h:603:void dump_mmu(CPUSPARCState *env);
  target/xtensa/cpu.h:697:void dump_mmu(CPUXtensaState *env);

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/ppc/cpu.h        | 2 +-
 target/ppc/mmu_common.c | 2 +-
 target/ppc/monitor.c    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index ba17ea83fa2..7fcafd590d4 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -3082,7 +3082,7 @@ static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv)
 }
 #endif
 
-void dump_mmu(Monitor *mon, CPUPPCState *env);
+void ppc_monitor_dump_mmu(Monitor *mon, CPUPPCState *env);
 
 void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);
 void ppc_store_vscr(CPUPPCState *env, uint32_t vscr);
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 5ea9b6d6773..00923c0b96e 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -547,7 +547,7 @@ static void mmu6xx_dump_mmu(Monitor *mon, CPUPPCState *env)
     }
 }
 
-void dump_mmu(Monitor *mon, CPUPPCState *env)
+void ppc_monitor_dump_mmu(Monitor *mon, CPUPPCState *env)
 {
     switch (env->mmu_model) {
     case POWERPC_MMU_BOOKE:
diff --git a/target/ppc/monitor.c b/target/ppc/monitor.c
index 41337d77a89..f95b1b44c2c 100644
--- a/target/ppc/monitor.c
+++ b/target/ppc/monitor.c
@@ -19,5 +19,5 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
         monitor_printf(mon, "No CPU available\n");
         return;
     }
-    dump_mmu(mon, env1);
+    ppc_monitor_dump_mmu(mon, env1);
 }
-- 
2.53.0

[PATCH-for-11.1 v2 7/7] target/xtensa: Rename dump_mmu() -> xtensa_monitor_dump_mmu()

[Philippe Mathieu-Daudé]

Rename dump_mmu() to avoid a name clash with other targets:

  $ git grep -w dump_mmu master | fgrep .h
  target/m68k/cpu.h:610:void dump_mmu(CPUM68KState *env);
  target/ppc/cpu.h:3083:void dump_mmu(CPUPPCState *env);
  target/sparc/cpu.h:603:void dump_mmu(CPUSPARCState *env);
  target/xtensa/cpu.h:697:void dump_mmu(CPUXtensaState *env);

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/xtensa/cpu.h        | 2 +-
 target/xtensa/mmu_helper.c | 2 +-
 target/xtensa/monitor.c    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index caec22bb742..095b4ced45f 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -693,7 +693,7 @@ int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb,
         uint32_t vaddr, int is_write, int mmu_idx,
         uint32_t *paddr, uint32_t *page_size, unsigned *access);
 void reset_mmu(CPUXtensaState *env);
-void dump_mmu(Monitor *mon, CPUXtensaState *env);
+void xtensa_monitor_dump_mmu(Monitor *mon, CPUXtensaState *env);
 
 static inline MemoryRegion *xtensa_get_er_region(CPUXtensaState *env)
 {
diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c
index 48e1d64a3d7..766fe60e2eb 100644
--- a/target/xtensa/mmu_helper.c
+++ b/target/xtensa/mmu_helper.c
@@ -1198,7 +1198,7 @@ static void dump_mpu(Monitor *mon, CPUXtensaState *env,
     }
 }
 
-void dump_mmu(Monitor *mon, CPUXtensaState *env)
+void xtensa_monitor_dump_mmu(Monitor *mon, CPUXtensaState *env)
 {
     if (xtensa_option_bits_enabled(env->config,
                 XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
diff --git a/target/xtensa/monitor.c b/target/xtensa/monitor.c
index 2761735f112..80ebba5acbd 100644
--- a/target/xtensa/monitor.c
+++ b/target/xtensa/monitor.c
@@ -34,5 +34,5 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
         monitor_printf(mon, "No CPU available\n");
         return;
     }
-    dump_mmu(mon, env1);
+    xtensa_monitor_dump_mmu(mon, env1);
 }
-- 
2.53.0

Re: [PATCH-for-11.1 v2 3/7] target/xtensa: Have 'info tlb' dump MMU information on monitor

[Max Filippov]

On Fri, Mar 20, 2026 at 9:50 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Currently 'info tlb' dumps the MMU information on stdout.
> Propagate the @Monitor argument and replace qemu_printf() by
> monitor_printf() -- or monitor_puts when no formatting -- to
> dump information over the monitor (which is not always stdout).
>
> Fixes: d41160a3e64 ("Sparc: implement monitor command 'info tlb'")

This commit reference doesn't look right, as none of the changed
code was introduced in that commit.

> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  target/xtensa/cpu.h        |  2 +-
>  target/xtensa/mmu_helper.c | 44 +++++++++++++++++++-------------------
>  target/xtensa/monitor.c    |  2 +-
>  3 files changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
> index dfd2ceab7cf..caec22bb742 100644
> --- a/target/xtensa/cpu.h
> +++ b/target/xtensa/cpu.h
> @@ -693,7 +693,7 @@ int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb,
>          uint32_t vaddr, int is_write, int mmu_idx,
>          uint32_t *paddr, uint32_t *page_size, unsigned *access);
>  void reset_mmu(CPUXtensaState *env);
> -void dump_mmu(CPUXtensaState *env);
> +void dump_mmu(Monitor *mon, CPUXtensaState *env);
>
>  static inline MemoryRegion *xtensa_get_er_region(CPUXtensaState *env)
>  {
> diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c
> index 71330fc84b9..9dbf671228b 100644
> --- a/target/xtensa/mmu_helper.c
> +++ b/target/xtensa/mmu_helper.c
> @@ -27,7 +27,6 @@
>
>  #include "qemu/osdep.h"
>  #include "qemu/log.h"
> -#include "qemu/qemu-print.h"
>  #include "qemu/units.h"
>  #include "cpu.h"
>  #include "exec/helper-proto.h"
> @@ -38,6 +37,7 @@
>  #include "exec/page-protection.h"
>  #include "exec/target_page.h"
>  #include "system/memory.h"
> +#include "monitor/monitor.h"
>
>  #define XTENSA_MPU_SEGMENT_MASK 0x0000001f
>  #define XTENSA_MPU_ACC_RIGHTS_MASK 0x00000f00
> @@ -1082,7 +1082,7 @@ int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb,
>      }
>  }
>
> -static void dump_tlb(CPUXtensaState *env, bool dtlb)
> +static void dump_tlb(Monitor *mon, CPUXtensaState *env, bool dtlb)
>  {
>      unsigned wi, ei;
>      const xtensa_tlb *conf =
> @@ -1121,11 +1121,11 @@ static void dump_tlb(CPUXtensaState *env, bool dtlb)
>
>                  if (print_header) {
>                      print_header = false;
> -                    qemu_printf("Way %u (%d %s)\n", wi, sz, sz_text);
> -                    qemu_printf("\tVaddr       Paddr       ASID  Attr RWX Cache\n"
> +                    monitor_printf(mon, "Way %u (%d %s)\n", wi, sz, sz_text);
> +                    monitor_puts(mon, "\tVaddr       Paddr       ASID  Attr RWX Cache\n"
>                                  "\t----------  ----------  ----  ---- --- -------\n");

These lines are aligned in the code same way as they are aligned
in the output. It'd be nice if this alignment could be preserved.

>                  }
> -                qemu_printf("\t0x%08x  0x%08x  0x%02x  0x%02x %c%c%c %s\n",
> +                monitor_printf(mon, "\t0x%08x  0x%08x  0x%02x  0x%02x %c%c%c %s\n",
>                              entry->vaddr,
>                              entry->paddr,
>                              entry->asid,
> @@ -1140,12 +1140,12 @@ static void dump_tlb(CPUXtensaState *env, bool dtlb)
>      }
>  }
>
> -static void dump_mpu(CPUXtensaState *env,
> +static void dump_mpu(Monitor *mon, CPUXtensaState *env,
>                       const xtensa_mpu_entry *entry, unsigned n)
>  {
>      unsigned i;
>
> -    qemu_printf("\t%s  Vaddr       Attr        Ring0  Ring1  System Type    CPU cache\n"
> +    monitor_printf(mon, "\t%s  Vaddr       Attr        Ring0  Ring1  System Type    CPU cache\n"
>                  "\t%s  ----------  ----------  -----  -----  -------------  ---------\n",

Same here.

>                  env ? "En" : "  ",
>                  env ? "--" : "  ");
> @@ -1157,7 +1157,7 @@ static void dump_mpu(CPUXtensaState *env,
>          unsigned type = mpu_attr_to_type(attr);
>          char cpu_cache = (type & XTENSA_MPU_TYPE_CPU_CACHE) ? '-' : ' ';
>
> -        qemu_printf("\t %c  0x%08x  0x%08x   %c%c%c    %c%c%c   ",
> +        monitor_printf(mon, "\t %c  0x%08x  0x%08x   %c%c%c    %c%c%c   ",
>                      env ?
>                      ((env->sregs[MPUENB] & (1u << i)) ? '+' : '-') : ' ',
>                      entry[i].vaddr, attr,
> @@ -1170,19 +1170,19 @@ static void dump_mpu(CPUXtensaState *env,
>
>          switch (type & XTENSA_MPU_SYSTEM_TYPE_MASK) {
>          case XTENSA_MPU_SYSTEM_TYPE_DEVICE:
> -            qemu_printf("Device %cB %3s\n",
> +            monitor_printf(mon, "Device %cB %3s\n",
>                          (type & XTENSA_MPU_TYPE_B) ? ' ' : 'n',
>                          (type & XTENSA_MPU_TYPE_INT) ? "int" : "");
>              break;
>          case XTENSA_MPU_SYSTEM_TYPE_NC:
> -            qemu_printf("Sys NC %cB      %c%c%c\n",
> +            monitor_printf(mon, "Sys NC %cB      %c%c%c\n",
>                          (type & XTENSA_MPU_TYPE_B) ? ' ' : 'n',
>                          (type & XTENSA_MPU_TYPE_CPU_R) ? 'r' : cpu_cache,
>                          (type & XTENSA_MPU_TYPE_CPU_W) ? 'w' : cpu_cache,
>                          (type & XTENSA_MPU_TYPE_CPU_C) ? 'c' : cpu_cache);
>              break;
>          case XTENSA_MPU_SYSTEM_TYPE_C:
> -            qemu_printf("Sys  C %c%c%c     %c%c%c\n",
> +            monitor_printf(mon, "Sys  C %c%c%c     %c%c%c\n",
>                          (type & XTENSA_MPU_TYPE_SYS_R) ? 'R' : '-',
>                          (type & XTENSA_MPU_TYPE_SYS_W) ? 'W' : '-',
>                          (type & XTENSA_MPU_TYPE_SYS_C) ? 'C' : '-',
> @@ -1191,29 +1191,29 @@ static void dump_mpu(CPUXtensaState *env,
>                          (type & XTENSA_MPU_TYPE_CPU_C) ? 'c' : cpu_cache);
>              break;
>          default:
> -            qemu_printf("Unknown\n");
> +            monitor_puts(mon, "Unknown\n");
>              break;
>          }
>      }
>  }
>
> -void dump_mmu(CPUXtensaState *env)
> +void dump_mmu(Monitor *mon, CPUXtensaState *env)
>  {
>      if (xtensa_option_bits_enabled(env->config,
>                  XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
>                  XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION) |
>                  XTENSA_OPTION_BIT(XTENSA_OPTION_MMU))) {
>
> -        qemu_printf("ITLB:\n");
> -        dump_tlb(env, false);
> -        qemu_printf("\nDTLB:\n");
> -        dump_tlb(env, true);
> +        monitor_puts(mon, "ITLB:\n");
> +        dump_tlb(mon, env, false);
> +        monitor_puts(mon, "\nDTLB:\n");
> +        dump_tlb(mon, env, true);
>      } else if (xtensa_option_enabled(env->config, XTENSA_OPTION_MPU)) {
> -        qemu_printf("Foreground map:\n");
> -        dump_mpu(env, env->mpu_fg, env->config->n_mpu_fg_segments);
> -        qemu_printf("\nBackground map:\n");
> -        dump_mpu(NULL, env->config->mpu_bg, env->config->n_mpu_bg_segments);
> +        monitor_puts(mon, "Foreground map:\n");
> +        dump_mpu(mon, env, env->mpu_fg, env->config->n_mpu_fg_segments);
> +        monitor_puts(mon, "\nBackground map:\n");
> +        dump_mpu(mon, NULL, env->config->mpu_bg, env->config->n_mpu_bg_segments);
>      } else {
> -        qemu_printf("No TLB for this CPU core\n");
> +        monitor_puts(mon, "No TLB for this CPU core\n");
>      }
>  }
> diff --git a/target/xtensa/monitor.c b/target/xtensa/monitor.c
> index 2af84934f83..2761735f112 100644
> --- a/target/xtensa/monitor.c
> +++ b/target/xtensa/monitor.c
> @@ -34,5 +34,5 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
>          monitor_printf(mon, "No CPU available\n");
>          return;
>      }
> -    dump_mmu(env1);
> +    dump_mmu(mon, env1);
>  }
> --
> 2.53.0
>


-- 
Thanks.
-- Max

Re: [PATCH-for-11.1 v2 4/7] target/xtensa: Display [ID]TLB header within dump_tlb()

[Max Filippov]

On Fri, Mar 20, 2026 at 9:50 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Move common code from caller to callee.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  target/xtensa/mmu_helper.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)

Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>

-- 
Thanks.
-- Max

Re: [PATCH-for-11.1 v2 7/7] target/xtensa: Rename dump_mmu() -> xtensa_monitor_dump_mmu()

[Max Filippov]

On Fri, Mar 20, 2026 at 9:51 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Rename dump_mmu() to avoid a name clash with other targets:
>
>   $ git grep -w dump_mmu master | fgrep .h
>   target/m68k/cpu.h:610:void dump_mmu(CPUM68KState *env);
>   target/ppc/cpu.h:3083:void dump_mmu(CPUPPCState *env);
>   target/sparc/cpu.h:603:void dump_mmu(CPUSPARCState *env);
>   target/xtensa/cpu.h:697:void dump_mmu(CPUXtensaState *env);
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  target/xtensa/cpu.h        | 2 +-
>  target/xtensa/mmu_helper.c | 2 +-
>  target/xtensa/monitor.c    | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>

-- 
Thanks.
-- Max

Re: [PATCH-for-11.1 v2 0/7] monitor: Have 'info tlb' dump MMU information on monitor

[Max Filippov]

On Fri, Mar 20, 2026 at 9:50 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Currently 'info tlb' dumps the MMU information on stdout, fix

That's not what I observe: I build QEMU from today's master
and run

qemu-system-xtensa -M kc705 -s -S -nographic \
        -chardev socket,id=mon,host=0.0.0.0,port=7777,server=on,wait=off \
        -mon chardev=mon

and `info tlb` in that monitor works as expected:

$ nc 127.0.0.1 7777
QEMU 10.2.90 monitor - type 'help' for more information
(qemu) info tlb
info tlb
ITLB:
Way 5 (128 MB)
       Vaddr       Paddr       ASID  Attr RWX Cache
       ----------  ----------  ----  ---- --- -------
       0xd0000000  0x00000000  0x01  0x07 RWX WB
       0xd8000000  0x00000000  0x01  0x03 RWX Bypass
Way 6 (256 MB)
       Vaddr       Paddr       ASID  Attr RWX Cache
       ----------  ----------  ----  ---- --- -------
       0xe0000000  0xf0000000  0x01  0x07 RWX WB
       0xf0000000  0xf0000000  0x01  0x03 RWX Bypass

DTLB:
Way 5 (128 MB)
       Vaddr       Paddr       ASID  Attr RWX Cache
       ----------  ----------  ----  ---- --- -------
       0xd0000000  0x00000000  0x01  0x07 RWX WB
       0xd8000000  0x00000000  0x01  0x03 RWX Bypass
Way 6 (256 MB)
       Vaddr       Paddr       ASID  Attr RWX Cache
       ----------  ----------  ----  ---- --- -------
       0xe0000000  0xf0000000  0x01  0x07 RWX WB
       0xf0000000  0xf0000000  0x01  0x03 RWX Bypass

> by using the monitor console instead. Rename the dump_mmu()
> functions to avoid name clash on single binary.

-- 
Thanks.
-- Max