From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58412) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEb6Z-00007y-Te for qemu-devel@nongnu.org; Wed, 28 Aug 2013 04:28:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VEb6T-0008JY-Bs for qemu-devel@nongnu.org; Wed, 28 Aug 2013 04:27:55 -0400 Received: from mail-oa0-f52.google.com ([209.85.219.52]:57449) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEb6T-0008JT-6N for qemu-devel@nongnu.org; Wed, 28 Aug 2013 04:27:49 -0400 Received: by mail-oa0-f52.google.com with SMTP id f4so7301764oah.11 for ; Wed, 28 Aug 2013 01:27:33 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: Date: Wed, 28 Aug 2013 12:27:33 +0400 Message-ID: From: Max Filippov Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] Fwd: trigger a gpio interrupt inside qemu List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: she roy Cc: qemu-devel On Wed, Aug 28, 2013 at 12:19 PM, she roy wrote: > PL061 has a register GPIOIS to control if the interrupt is lever-triggered > or edge-triggered, I will try this. Thanks. This register defines which event on the GPIO side causes PL061 to generate IRQ. The IRQ it generates is always signalled by level. You need to update GPIOIC register from your driver's ISR to clear it. > > 2013/8/28 Max Filippov >> >> On Wed, Aug 28, 2013 at 12:01 PM, she roy wrote: >> > I tested qemu_irq_pulse(gPl061->irq); the guest did not generate an >> > interrupt. so I changed to >> > >> > qemu_set_irq(gPl061->irq, 1); >> > sleep(1); >> > qemu_set_irq(gPl061->irq, 0); >> > >> > A lot of interrupts generated. Is it possible to generate just one >> > interrupt? >> >> This looks like level-triggered interrupt behaviour. In such cases >> interrupt handler >> in the device driver is usually responsible for disabling IRQ line >> while processing >> interrupt. You can add a register to your device, writing to which would >> call >> >> qemu_set_irq(gPl061->irq, 0) >> >> and write to that register from your driver's ISR. >> Or you can choose an edge-triggered IRQ to play with. >> >> > 2013/8/27 Max Filippov >> >> >> >> On Tue, Aug 27, 2013 at 3:55 PM, she roy wrote: >> >> > How to lower it? Thank you very much! >> >> > >> >> >> >> qemu_set_irq(gPl061->irq, 0); >> >> >> >> Or you could try >> >> >> >> void pl061_raise_irq() >> >> { >> >> qemu_irq_pulse(gPl061->irq); >> >> } >> >> >> >> > 2013/8/27 Max Filippov >> >> >> >> >> >> On Tue, Aug 27, 2013 at 3:36 PM, she roy >> >> >> wrote: >> >> >> > Is there somebody can help me to trigger a gpio interrupt inside >> >> >> > qemu? I >> >> >> > wrote a simple function to trigger a interrupt in pl061.c as >> >> >> > follow: >> >> >> > PL061State *gPl061; >> >> >> > void pl061_raise_irq() >> >> >> > { >> >> >> > qemu_set_irq(gPl061->irq, 1); >> >> >> > } >> >> >> >> >> >> [...] >> >> >> >> >> >> > But when i call pl061_raise_irq inside qemu once, the guest run >> >> >> > into >> >> >> > an >> >> >> > infinite loop. it prints: >> >> >> > ... >> >> >> > irq:[927012]receive the irq at -12002... >> >> >> > irq:[927013]receive the irq at -12002... >> >> >> > irq:[927014]receive the irq at -12002... >> >> >> > irq:[927015]receive the irq at -12002... >> >> >> > irq:[927016]receive the irq at -12002... >> >> >> > irq:[927017]receive the irq at -12002... >> >> >> > irq:[927018]receive the irq at -12002... >> >> >> > ... >> >> >> > can somebody tell me what's wrong? >> >> >> >> >> >> You have raised IRQ in your pl061_raise_irq(), but you haven't >> >> >> lowered >> >> >> it. >> >> -- >> Thanks. >> -- Max > > -- Thanks. -- Max