From: Max Filippov <jcmvbkbc@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [PATCH 09/21] target/xtensa: add DFP option, registers and opcodes
Date: Wed, 8 Jul 2020 22:14:52 -0700 [thread overview]
Message-ID: <CAMo8BfLtJsfOA+8b2usmZ-SMwBW6nd0TdWzT9Ck_B6xRLP3W5w@mail.gmail.com> (raw)
In-Reply-To: <26e7179e-692c-9467-b2d2-c04c6f03b0db@linaro.org>
On Wed, Jul 8, 2020 at 5:19 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
> Do I read that right,
[...]
> means that if DFP is present, float64 has use_first_nan, but float32 does not?!?
That's correct. And float64 madd.d/msub.d again don't have it.
> What in the world is going on?
My thoughts exactly. What I've found out is that at least
it wasn't meant to be like that. But also it is not specified
in any official documentation, and that I guess is one of
the reasons why it's like that. There are also no plans to
change it.
> >> E.g. the translator could remember the previous setting within the TB, only
> >> changing when necessary. E.g. if env->config->use_first_nan, then set it
> >> during reset and never change it again. Similarly if DFP is not enabled.
> >
> > This thought crossed my mind too, but then set_use_first_nan only
> > sets one variable in the float_status and gets inlined.
> > Is it worth the trouble?
>
> You have a point that the operation I'm trying to avoid is trivial, and
> probably not worth much. But I had hoped that a given cpu would stick with one
> method and not change it.
CPU with only a single precision FPU (either FPU2000 or DFPU)
could do it, but apparently not one with a full DFPU.
We could give full DFPU its own implementations of single precision
helpers and choose appropriate helper at translation time.
I just felt that it would neither simplify the code nor have any
performance impact.
--
Thanks.
-- Max
next prev parent reply other threads:[~2020-07-09 5:16 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-06 23:47 [PATCH 00/21] target/xtensa: implement double precision FPU Max Filippov
2020-07-06 23:47 ` [PATCH 01/21] softfloat: make NO_SIGNALING_NANS runtime property Max Filippov
2020-07-07 10:28 ` Alex Bennée
2020-07-08 17:41 ` Philippe Mathieu-Daudé
2020-07-06 23:47 ` [PATCH 02/21] softfloat: pass float_status pointer to pickNaN Max Filippov
2020-07-07 10:29 ` Alex Bennée
2020-07-06 23:47 ` [PATCH 03/21] softfloat: add xtensa specialization for pickNaNMulAdd Max Filippov
2020-07-07 10:29 ` Alex Bennée
2020-07-08 16:07 ` Richard Henderson
2020-07-08 18:11 ` Max Filippov
2020-07-06 23:47 ` [PATCH 04/21] target/xtensa: add geometry to xtensa_get_regfile_by_name Max Filippov
2020-07-06 23:47 ` [PATCH 05/21] target/xtensa: support copying registers up to 64 bits wide Max Filippov
2020-07-08 16:14 ` Richard Henderson
2020-07-08 17:14 ` Max Filippov
2020-07-06 23:47 ` [PATCH 06/21] target/xtensa: rename FPU2000 translators and helpers Max Filippov
2020-07-08 16:18 ` Richard Henderson
2020-07-06 23:47 ` [PATCH 07/21] target/xtensa: move FSR/FCR register accessors Max Filippov
2020-07-08 16:18 ` Richard Henderson
2020-07-06 23:47 ` [PATCH 08/21] target/xtensa: don't access BR regfile directly Max Filippov
2020-07-08 16:18 ` Richard Henderson
2020-07-06 23:47 ` [PATCH 09/21] target/xtensa: add DFP option, registers and opcodes Max Filippov
2020-07-08 16:25 ` Richard Henderson
2020-07-08 17:37 ` Max Filippov
2020-07-09 0:19 ` Richard Henderson
2020-07-09 5:14 ` Max Filippov [this message]
2020-07-06 23:47 ` [PATCH 10/21] target/xtensa: implement FPU division and square root Max Filippov
2020-07-06 23:47 ` [PATCH 11/21] tests/tcg/xtensa: fix test execution on ISS Max Filippov
2020-07-06 23:47 ` [PATCH 12/21] tests/tcg/xtensa: update test_fp0_arith for DFPU Max Filippov
2020-07-06 23:47 ` [PATCH 13/21] tests/tcg/xtensa: expand madd tests Max Filippov
2020-07-06 23:47 ` [PATCH 14/21] tests/tcg/xtensa: update test_fp0_conv for DFPU Max Filippov
2020-07-06 23:47 ` [PATCH 15/21] tests/tcg/xtensa: update test_fp1 " Max Filippov
2020-07-06 23:47 ` [PATCH 16/21] tests/tcg/xtensa: update test_lsc " Max Filippov
2020-07-06 23:47 ` [PATCH 17/21] tests/tcg/xtensa: add fp0 div and sqrt tests Max Filippov
2020-07-06 23:47 ` [PATCH 18/21] tests/tcg/xtensa: test double precision load/store Max Filippov
2020-07-06 23:47 ` [PATCH 19/21] tests/tcg/xtensa: add DFP0 arith tests Max Filippov
2020-07-06 23:47 ` [PATCH 20/21] target/xtensa: import DE_233L_FPU core Max Filippov
2020-07-06 23:47 ` [PATCH 21/21] target/xtensa: import DSP3400 core Max Filippov
2020-07-07 11:31 ` [PATCH 00/21] target/xtensa: implement double precision FPU Alex Bennée
2020-07-07 16:56 ` Max Filippov
2020-07-07 19:21 ` Alex Bennée
2020-07-07 23:14 ` Max Filippov
2020-07-08 8:50 ` Alex Bennée
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