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[209.85.128.175]) by smtp.gmail.com with ESMTPSA id y82-20020a0dd655000000b005a7ab32d454sm2221887ywd.10.2023.10.19.00.14.44 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 Oct 2023 00:14:44 -0700 (PDT) Received: by mail-yw1-f175.google.com with SMTP id 00721157ae682-59e88a28b98so4105187b3.1 for ; Thu, 19 Oct 2023 00:14:44 -0700 (PDT) X-Received: by 2002:a0d:d710:0:b0:5a5:575:e944 with SMTP id z16-20020a0dd710000000b005a50575e944mr848560ywd.4.1697699684389; Thu, 19 Oct 2023 00:14:44 -0700 (PDT) MIME-Version: 1.0 References: <20231018124023.2927710-1-geert+renesas@glider.be> <875y338j2c.wl-ysato@users.sourceforge.jp> In-Reply-To: <875y338j2c.wl-ysato@users.sourceforge.jp> From: Geert Uytterhoeven Date: Thu, 19 Oct 2023 09:14:30 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH RFC] hw/sh4/sh7750: Add STBCR/STBCR2 register support To: Yoshinori Sato Cc: Guenter Roeck , qemu-devel@nongnu.org, linux-sh@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=209.85.128.175; envelope-from=geert.uytterhoeven@gmail.com; helo=mail-yw1-f175.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Sato-san, On Thu, Oct 19, 2023 at 4:03=E2=80=AFAM Yoshinori Sato wrote: > On Wed, 18 Oct 2023 21:40:23 +0900, > Geert Uytterhoeven wrote: > > The new Linux SH7750 clock driver uses the registers for power-down > > mode control, causing a crash: > > > > byte read to SH7750_STBCR_A7 (0x000000001fc00004) not supported > > Aborted (core dumped) > > > > Fix this by adding support for the Standby Control Registers STBCR and > > STBCR2. > > FRQCR is also not returning the correct value, so it needs to be fixed. I knew there would be more, hence the RFC ;-) > Here are my changes. > https://gitlab.com/yoshinori.sato/qemu.git > > It include. > - Minimal CPG support. > - DT support > - Add target LANDISK. Thank you very much! It would be a good idea to mention this is the cover letter of your Linux patch series, so your test audience doesn't have to fix already-solved problems... BTW, your commit da64d6541226a516 ("hw/sh4: sh7750.c allow access STBCR and STBCR2.") just ignores writes, and always returns zero when reading. This may cause issues with Linux code relying on clock_ops.is_enabled() to return correct data. Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= .org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds