From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E3F81C433F5 for ; Wed, 3 Nov 2021 18:30:29 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 46AC661156 for ; Wed, 3 Nov 2021 18:30:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 46AC661156 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bsdimp.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:51154 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1miL1n-0004AY-Hv for qemu-devel@archiver.kernel.org; Wed, 03 Nov 2021 14:30:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59358) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1miKzL-0001m4-SJ for qemu-devel@nongnu.org; Wed, 03 Nov 2021 14:27:56 -0400 Received: from mail-ua1-x92a.google.com ([2607:f8b0:4864:20::92a]:45952) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1miKzH-0004JG-7s for qemu-devel@nongnu.org; Wed, 03 Nov 2021 14:27:55 -0400 Received: by mail-ua1-x92a.google.com with SMTP id ay21so6100745uab.12 for ; Wed, 03 Nov 2021 11:27:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdimp-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=FhK8RbzEFufb1iq23r34WkDiA3ShkcQ+NWfPmmVrVXU=; b=YPk8rg4v1YBDgnetEi5QPwdZgcCg6/J1+1Fy5bXzmafafAJGY4A9vn0Q99JXJ+auuN 6Jg9DoNBvhgvm3HRgPpZ0utl91G+D20FPOXTAFzqEBTpJgiljWxhhWf+c2OA9TcgKQyP 3eqOhWyi5a/dvdUpKc5QLJd3H9Iz8hIw1YEUOTOPBMAubAzImlviVDkksSSnUcCH/jRH gIvBKhbpk5ffOrR45UdrXpoPqNl3GbbnTPu/cU+jPuvNssl6lFNDHGRq5M2fQmnfCu12 kKeO12GRvlbtyslACWlLgk/7DJ+ZuzuaObrkiUYvhdV+D2ri3yDgjwVfZ9H1mD7ENDu2 eEXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=FhK8RbzEFufb1iq23r34WkDiA3ShkcQ+NWfPmmVrVXU=; b=w7ItRXglOK7CubyyGuDcNKCwKHjt0ySSej/Op75cmtaBPf5qSDdn2C6lf9TuQBPkyV 3/AhYmW+h882EhL2rs3Ksh1TrmuL3tIALA87/fdze75AUtrRJqFxjIfFO0ouZnnM771y y7Hn1LBcXb5jkE88hqWnhUG/4c6GpCV/+Chd9QO559F4CS0a3d/aZwuf2VU6+ziwI9RV ZedAck5QuyAJcOlnFPuSJK+d1nUAAU3Kfb9fdErREx05a2bjQpOWugzt/W7ajvHHjYbj 7JCVOrJkyV4vxD6oQabpfT6/ukR3uwXR/XjPe1yqYP0xCXZjovZeq1ZbZbmeB/eI29Ur S0wQ== X-Gm-Message-State: AOAM533UENHaMD8oC2ytcliqdTJz6sb37jgA5icVFamcJac2xuPUl2qY FCJR6/CH5aw+xdO8FWQ78EuV4ib7+8e+oJbgpOc6nw== X-Google-Smtp-Source: ABdhPJzJr4VKaZ6fUPmMjzvjy4dYPA9aicNSAbcb/S/zKks/wi2e7Sa6eRwgo1FFccyZiELw0Lh/FVI+KnbD45HqDNA= X-Received: by 2002:a05:6102:10c7:: with SMTP id t7mr38820201vsr.44.1635964069759; Wed, 03 Nov 2021 11:27:49 -0700 (PDT) MIME-Version: 1.0 References: <20211102225248.52999-1-imp@bsdimp.com> <20211102225248.52999-15-imp@bsdimp.com> <1e865859-b1bc-6e80-816f-da4858a8f2cd@linaro.org> In-Reply-To: <1e865859-b1bc-6e80-816f-da4858a8f2cd@linaro.org> From: Warner Losh Date: Wed, 3 Nov 2021 12:27:38 -0600 Message-ID: Subject: Re: [PATCH v2 14/30] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread To: Richard Henderson Content-Type: multipart/alternative; boundary="0000000000003e643805cfe69148" Received-SPF: none client-ip=2607:f8b0:4864:20::92a; envelope-from=wlosh@bsdimp.com; helo=mail-ua1-x92a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stacey Son , QEMU Trivial , Kyle Evans , Michael Tokarev , Laurent Vivier , QEMU Developers , Olivier Houchard , Philippe Mathieu-Daude Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --0000000000003e643805cfe69148 Content-Type: text/plain; charset="UTF-8" [[ Adding Olivier Houchard to confirm my reading of the ARM init twisty maze of code ]] On Tue, Nov 2, 2021 at 9:31 PM Richard Henderson < richard.henderson@linaro.org> wrote: > On 11/2/21 6:52 PM, Warner Losh wrote: > > + /* > > + * Thumb mode is encoded by the low bit in the entry point (since > ARM can't > > + * execute at odd addresses). When it's set, set the Thumb bit (T) > in the > > + * CPSR. > > + */ > > + if (entry & 0x1) { > > + cpsr_write(env, cpsr_read(env) | CPSR_T, CPSR_T, > CPSRWriteByInstr); > > + } > > This should be > > cpsr_write(env, (entry & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr); > > because you need to clear T for arm mode as well. > Ah. Right. I'd intended to fix this, but it slipped my mind (along with the other T bit thing you told me about). > > + /* FIXME - what to for failure of get_user()? */ > > + get_user_ual(regs->ARM_r2, stack + 8); /* envp */ > > + get_user_ual(regs->ARM_r1, stack + 4); /* envp */ > > Surely these values are present in image_info anyway? > The host versions are in image_info, but the target versions are not. Linux-user does a similar thing without the #define sugar form ARM_rX. I didn't see where the current bsd-user squirrels this information away (it's computed and stored in local variables), nor did my much more brief look at linux-user. Looking at the FreeBSD kernel, though, we don't set r1 or r2. r0 and r1 are set to 0 explicitly, and r2 is set to 0 because the first user registers are all cleared. In the static case, they are ignored (since r0 = ps_strings, r1 = obj_main (unused) and r2 = cleanup (also unused in the static case). If we're entering via the dynamic loader, it saves r0 and generates r1 (though it's ultimately unused) and r2 (which rtld sets to its cleanup routine). r0 is the ps strings that ps displays, so isn't relevant to emulation. tl;dr: I'll add a comment to that effect and make it simpler (assuming my analysis survives) Warner --0000000000003e643805cfe69148 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

[[ Adding Olivier Houchard to c= onfirm my reading of the ARM init twisty maze of code ]]
On Tue, Nov 2, 2021 at 9:= 31 PM Richard Henderson <richard.henderson@linaro.org> wrote:
On 11/2/21 6:52 PM, Warner Losh wrote:
> +=C2=A0 =C2=A0 /*
> +=C2=A0 =C2=A0 =C2=A0* Thumb mode is encoded by the low bit in the ent= ry point (since ARM can't
> +=C2=A0 =C2=A0 =C2=A0* execute at odd addresses). When it's set, s= et the Thumb bit (T) in the
> +=C2=A0 =C2=A0 =C2=A0* CPSR.
> +=C2=A0 =C2=A0 =C2=A0*/
> +=C2=A0 =C2=A0 if (entry & 0x1) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 cpsr_write(env, cpsr_read(env) | CPSR_T, = CPSR_T, CPSRWriteByInstr);
> +=C2=A0 =C2=A0 }

This should be

=C2=A0 =C2=A0cpsr_write(env, (entry & 1) * CPSR_T, CPSR_T, CPSRWriteByI= nstr);

because you need to clear T for arm mode as well.

=
Ah. Right. I'd intended to fix this, but it slipped my mind = (along with the other T bit thing you told me about).
=C2=A0
> +=C2=A0 =C2=A0 /* FIXME - what to for failure of get_user()? */
> +=C2=A0 =C2=A0 get_user_ual(regs->ARM_r2, stack + 8); /* envp */ > +=C2=A0 =C2=A0 get_user_ual(regs->ARM_r1, stack + 4); /* envp */
Surely these values are present in image_info anyway?
=
The host versions are in image_info, but the target versions= are not.=C2=A0 Linux-user does a similar
thing without the #defi= ne sugar form ARM_rX. I didn't see where the current bsd-user squirrels=
this information away (it's computed and stored in local var= iables), nor did my much more
brief look at linux-user.=C2=A0

Looking at the FreeBSD kernel, though, we don't s= et r1 or r2. r0 and r1 are set to 0 explicitly,
and r2 is set to = 0 because the first user registers are all cleared. In the static case, the= y
are ignored (since r0 =3D ps_strings, r1 =3D obj_main (unused) = and r2 =3D cleanup (also
unused in the static case). If we're= entering via the dynamic loader, it saves r0 and generates
r1 (t= hough it's ultimately unused) and r2 (which rtld sets to its cleanup ro= utine). r0 is the ps
strings that ps displays, so isn't relev= ant to emulation.

tl;dr: I'll add a comment to= that effect and make it simpler (assuming my analysis survives)
=
Warner
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