From: Warner Losh <imp@bsdimp.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Laurent Vivier" <laurent@vivier.eu>
Subject: Re: [PATCH v5 07/67] linux-user/host/x86: Populate host_signal.h
Date: Fri, 15 Oct 2021 12:26:28 -0600 [thread overview]
Message-ID: <CANCZdfqH81z02X3bSCOYmkHHvF+zx_YLbegYksAeRXetq677Sg@mail.gmail.com> (raw)
In-Reply-To: <20211015041053.2769193-8-richard.henderson@linaro.org>
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On Thu, Oct 14, 2021 at 10:11 PM Richard Henderson <
richard.henderson@linaro.org> wrote:
> Split host_signal_pc and host_signal_write out of user-exec.c.
> Drop the *BSD code, to be re-created under bsd-user/ later.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> linux-user/host/i386/host-signal.h | 25 ++++-
> linux-user/host/x32/host-signal.h | 2 +-
> linux-user/host/x86_64/host-signal.h | 25 ++++-
> accel/tcg/user-exec.c | 136 +--------------------------
> 4 files changed, 50 insertions(+), 138 deletions(-)
>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Though I've not pulled this into bsd-user to see how it affects me,
so I may come to regret this :)
Warner
> diff --git a/linux-user/host/i386/host-signal.h
> b/linux-user/host/i386/host-signal.h
> index f4b4d65031..ccbbee5082 100644
> --- a/linux-user/host/i386/host-signal.h
> +++ b/linux-user/host/i386/host-signal.h
> @@ -1 +1,24 @@
> -#define HOST_SIGNAL_PLACEHOLDER
> +/*
> + * host-signal.h: signal info dependent on the host architecture
> + *
> + * Copyright (C) 2021 Linaro Limited
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or
> later.
> + * See the COPYING file in the top-level directory.
> + */
> +
> +#ifndef I386_HOST_SIGNAL_H
> +#define I386_HOST_SIGNAL_H
> +
> +static inline uintptr_t host_signal_pc(ucontext_t *uc)
> +{
> + return uc->uc_mcontext.gregs[REG_EIP];
> +}
> +
> +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
> +{
> + return uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe
> + && (uc->uc_mcontext.gregs[REG_ERR] & 0x2);
> +}
> +
> +#endif
> diff --git a/linux-user/host/x32/host-signal.h
> b/linux-user/host/x32/host-signal.h
> index f4b4d65031..26800591d3 100644
> --- a/linux-user/host/x32/host-signal.h
> +++ b/linux-user/host/x32/host-signal.h
> @@ -1 +1 @@
> -#define HOST_SIGNAL_PLACEHOLDER
> +#include "../x86_64/host-signal.h"
> diff --git a/linux-user/host/x86_64/host-signal.h
> b/linux-user/host/x86_64/host-signal.h
> index f4b4d65031..883d2fcf65 100644
> --- a/linux-user/host/x86_64/host-signal.h
> +++ b/linux-user/host/x86_64/host-signal.h
> @@ -1 +1,24 @@
> -#define HOST_SIGNAL_PLACEHOLDER
> +/*
> + * host-signal.h: signal info dependent on the host architecture
> + *
> + * Copyright (C) 2021 Linaro Limited
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or
> later.
> + * See the COPYING file in the top-level directory.
> + */
> +
> +#ifndef X86_64_HOST_SIGNAL_H
> +#define X86_64_HOST_SIGNAL_H
> +
> +static inline uintptr_t host_signal_pc(ucontext_t *uc)
> +{
> + return uc->uc_mcontext.gregs[REG_RIP];
> +}
> +
> +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
> +{
> + return uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe
> + && (uc->uc_mcontext.gregs[REG_ERR] & 0x2);
> +}
> +
> +#endif
> diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
> index 744af19397..474cb9cf82 100644
> --- a/accel/tcg/user-exec.c
> +++ b/accel/tcg/user-exec.c
> @@ -29,19 +29,6 @@
> #include "trace/trace-root.h"
> #include "internal.h"
>
> -#undef EAX
> -#undef ECX
> -#undef EDX
> -#undef EBX
> -#undef ESP
> -#undef EBP
> -#undef ESI
> -#undef EDI
> -#undef EIP
> -#ifdef __linux__
> -#include <sys/ucontext.h>
> -#endif
> -
> __thread uintptr_t helper_retaddr;
>
> //#define DEBUG_SIGNAL
> @@ -268,123 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong
> addr, int size,
> return size ? g2h(env_cpu(env), addr) : NULL;
> }
>
> -#if defined(__i386__)
> -
> -#if defined(__NetBSD__)
> -#include <ucontext.h>
> -#include <machine/trap.h>
> -
> -#define EIP_sig(context) ((context)->uc_mcontext.__gregs[_REG_EIP])
> -#define TRAP_sig(context) ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
> -#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
> -#define MASK_sig(context) ((context)->uc_sigmask)
> -#define PAGE_FAULT_TRAP T_PAGEFLT
> -#elif defined(__FreeBSD__) || defined(__DragonFly__)
> -#include <ucontext.h>
> -#include <machine/trap.h>
> -
> -#define EIP_sig(context) (*((unsigned long
> *)&(context)->uc_mcontext.mc_eip))
> -#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
> -#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
> -#define MASK_sig(context) ((context)->uc_sigmask)
> -#define PAGE_FAULT_TRAP T_PAGEFLT
> -#elif defined(__OpenBSD__)
> -#include <machine/trap.h>
> -#define EIP_sig(context) ((context)->sc_eip)
> -#define TRAP_sig(context) ((context)->sc_trapno)
> -#define ERROR_sig(context) ((context)->sc_err)
> -#define MASK_sig(context) ((context)->sc_mask)
> -#define PAGE_FAULT_TRAP T_PAGEFLT
> -#else
> -#define EIP_sig(context) ((context)->uc_mcontext.gregs[REG_EIP])
> -#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
> -#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
> -#define MASK_sig(context) ((context)->uc_sigmask)
> -#define PAGE_FAULT_TRAP 0xe
> -#endif
> -
> -int cpu_signal_handler(int host_signum, void *pinfo,
> - void *puc)
> -{
> - siginfo_t *info = pinfo;
> -#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
> - ucontext_t *uc = puc;
> -#elif defined(__OpenBSD__)
> - struct sigcontext *uc = puc;
> -#else
> - ucontext_t *uc = puc;
> -#endif
> - unsigned long pc;
> - int trapno;
> -
> -#ifndef REG_EIP
> -/* for glibc 2.1 */
> -#define REG_EIP EIP
> -#define REG_ERR ERR
> -#define REG_TRAPNO TRAPNO
> -#endif
> - pc = EIP_sig(uc);
> - trapno = TRAP_sig(uc);
> - return handle_cpu_signal(pc, info,
> - trapno == PAGE_FAULT_TRAP ?
> - (ERROR_sig(uc) >> 1) & 1 : 0,
> - &MASK_sig(uc));
> -}
> -
> -#elif defined(__x86_64__)
> -
> -#ifdef __NetBSD__
> -#include <machine/trap.h>
> -#define PC_sig(context) _UC_MACHINE_PC(context)
> -#define TRAP_sig(context)
> ((context)->uc_mcontext.__gregs[_REG_TRAPNO])
> -#define ERROR_sig(context) ((context)->uc_mcontext.__gregs[_REG_ERR])
> -#define MASK_sig(context) ((context)->uc_sigmask)
> -#define PAGE_FAULT_TRAP T_PAGEFLT
> -#elif defined(__OpenBSD__)
> -#include <machine/trap.h>
> -#define PC_sig(context) ((context)->sc_rip)
> -#define TRAP_sig(context) ((context)->sc_trapno)
> -#define ERROR_sig(context) ((context)->sc_err)
> -#define MASK_sig(context) ((context)->sc_mask)
> -#define PAGE_FAULT_TRAP T_PAGEFLT
> -#elif defined(__FreeBSD__) || defined(__DragonFly__)
> -#include <ucontext.h>
> -#include <machine/trap.h>
> -
> -#define PC_sig(context) (*((unsigned long
> *)&(context)->uc_mcontext.mc_rip))
> -#define TRAP_sig(context) ((context)->uc_mcontext.mc_trapno)
> -#define ERROR_sig(context) ((context)->uc_mcontext.mc_err)
> -#define MASK_sig(context) ((context)->uc_sigmask)
> -#define PAGE_FAULT_TRAP T_PAGEFLT
> -#else
> -#define PC_sig(context) ((context)->uc_mcontext.gregs[REG_RIP])
> -#define TRAP_sig(context) ((context)->uc_mcontext.gregs[REG_TRAPNO])
> -#define ERROR_sig(context) ((context)->uc_mcontext.gregs[REG_ERR])
> -#define MASK_sig(context) ((context)->uc_sigmask)
> -#define PAGE_FAULT_TRAP 0xe
> -#endif
> -
> -int cpu_signal_handler(int host_signum, void *pinfo,
> - void *puc)
> -{
> - siginfo_t *info = pinfo;
> - unsigned long pc;
> -#if defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__)
> - ucontext_t *uc = puc;
> -#elif defined(__OpenBSD__)
> - struct sigcontext *uc = puc;
> -#else
> - ucontext_t *uc = puc;
> -#endif
> -
> - pc = PC_sig(uc);
> - return handle_cpu_signal(pc, info,
> - TRAP_sig(uc) == PAGE_FAULT_TRAP ?
> - (ERROR_sig(uc) >> 1) & 1 : 0,
> - &MASK_sig(uc));
> -}
> -
> -#elif defined(_ARCH_PPC)
> +#if defined(_ARCH_PPC)
>
> /***********************************************************************
> * signal context platform-specific definitions
> @@ -895,11 +766,6 @@ int cpu_signal_handler(int host_signum, void *pinfo,
>
> return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask);
> }
> -
> -#else
> -
> -#error host CPU specific signal handler needed
> -
> #endif
>
> /* The softmmu versions of these helpers are in cputlb.c. */
> --
> 2.25.1
>
>
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next prev parent reply other threads:[~2021-10-15 18:28 UTC|newest]
Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-15 4:09 [PATCH v5 00/67] user-only: Cleanup SIGSEGV and SIGBUS handling Richard Henderson
2021-10-15 4:09 ` [PATCH v5 01/67] accel/tcg: Split out adjust_signal_pc Richard Henderson
2021-10-15 18:18 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 02/67] accel/tcg: Move clear_helper_retaddr to cpu loop Richard Henderson
2021-10-15 4:09 ` [PATCH v5 03/67] accel/tcg: Split out handle_sigsegv_accerr_write Richard Henderson
2021-10-15 18:19 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 04/67] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Richard Henderson
2021-10-15 18:20 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 05/67] configure: Merge riscv32 and riscv64 host architectures Richard Henderson
2021-10-15 18:21 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 06/67] linux-user: Reorg handling for SIGSEGV Richard Henderson
2021-10-15 4:09 ` [PATCH v5 07/67] linux-user/host/x86: Populate host_signal.h Richard Henderson
2021-10-15 18:26 ` Warner Losh [this message]
2021-10-15 4:09 ` [PATCH v5 08/67] linux-user/host/ppc: " Richard Henderson
2021-10-15 4:09 ` [PATCH v5 09/67] linux-user/host/alpha: " Richard Henderson
2021-10-15 4:09 ` [PATCH v5 10/67] linux-user/host/sparc: " Richard Henderson
2021-10-15 18:30 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 11/67] linux-user/host/arm: " Richard Henderson
2021-10-15 18:30 ` Warner Losh
2021-10-15 4:09 ` [PATCH v5 12/67] linux-user/host/aarch64: " Richard Henderson
2021-10-15 18:30 ` Warner Losh
2021-10-15 19:49 ` Richard Henderson
2021-10-15 4:09 ` [PATCH v5 13/67] linux-user/host/s390: " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 14/67] linux-user/host/mips: " Richard Henderson
2021-10-15 18:31 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 15/67] linux-user/host/riscv: " Richard Henderson
2021-10-15 18:32 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 16/67] target/arm: Fixup comment re handle_cpu_signal Richard Henderson
2021-10-15 18:32 ` Warner Losh
2021-10-29 23:27 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 17/67] linux-user/host/riscv: Improve host_signal_write Richard Henderson
2021-10-15 4:10 ` [PATCH v5 18/67] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Richard Henderson
2021-10-15 4:10 ` [PATCH v5 19/67] hw/core: Add TCGCPUOps.record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 20/67] linux-user: Add cpu_loop_exit_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 21/67] target/alpha: Implement alpha_cpu_record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 22/67] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup Richard Henderson
2021-10-15 18:34 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 23/67] target/arm: Implement arm_cpu_record_sigsegv Richard Henderson
2021-10-15 18:35 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 24/67] target/cris: Make cris_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 25/67] target/hexagon: Remove hexagon_cpu_tlb_fill Richard Henderson
2021-10-15 4:10 ` [PATCH v5 26/67] target/hppa: Make hppa_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 27/67] target/i386: Implement x86_cpu_record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 28/67] target/m68k: Make m68k_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 29/67] target/microblaze: Make mb_cpu_tlb_fill " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 30/67] target/mips: Make mips_cpu_tlb_fill " Richard Henderson
2021-10-15 18:40 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 31/67] target/nios2: Implement nios2_cpu_record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 32/67] linux-user/openrisc: Adjust signal for EXCP_RANGE, EXCP_FPE Richard Henderson
2021-10-15 4:10 ` [PATCH v5 33/67] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 34/67] target/ppc: Implement ppc_cpu_record_sigsegv Richard Henderson
2021-10-15 18:45 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 35/67] target/riscv: Make riscv_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 18:45 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 36/67] target/s390x: Use probe_access_flags in s390_probe_access Richard Henderson
2021-10-15 4:10 ` [PATCH v5 37/67] target/s390x: Implement s390_cpu_record_sigsegv Richard Henderson
2021-10-15 4:10 ` [PATCH v5 38/67] target/sh4: Make sh4_cpu_tlb_fill sysemu only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 39/67] target/sparc: Make sparc_cpu_tlb_fill " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 40/67] target/xtensa: Make xtensa_cpu_tlb_fill " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 41/67] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Richard Henderson
2021-10-15 4:10 ` [PATCH v5 42/67] Revert "cpu: Move cpu_common_props to hw/core/cpu.c" Richard Henderson
2021-10-15 4:10 ` [PATCH v5 43/67] hw/core: Add TCGCPUOps.record_sigbus Richard Henderson
2021-10-15 18:47 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 44/67] linux-user: Add cpu_loop_exit_sigbus Richard Henderson
2021-10-15 18:49 ` Warner Losh
2021-10-29 23:35 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 45/67] target/alpha: Implement alpha_cpu_record_sigbus Richard Henderson
2021-10-15 4:10 ` [PATCH v5 46/67] target/arm: Implement arm_cpu_record_sigbus Richard Henderson
2021-10-15 19:05 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 47/67] linux-user/hppa: Remove EXCP_UNALIGN handling Richard Henderson
2021-10-15 4:10 ` [PATCH v5 48/67] target/microblaze: Do not set MO_ALIGN for user-only Richard Henderson
2021-10-15 4:10 ` [PATCH v5 49/67] target/ppc: Move SPR_DSISR setting to powerpc_excp Richard Henderson
2021-10-15 4:10 ` [PATCH v5 50/67] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-10-15 4:10 ` [PATCH v5 51/67] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu Richard Henderson
2021-10-15 19:06 ` Warner Losh
2021-10-29 23:36 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 52/67] target/s390x: Implement s390x_cpu_record_sigbus Richard Henderson
2021-10-29 23:38 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 53/67] linux-user/hppa: Remove POWERPC_EXCP_ALIGN handling Richard Henderson
2021-10-29 23:39 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 54/67] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-10-15 4:10 ` [PATCH v5 55/67] target/sparc: Remove DEBUG_UNALIGNED Richard Henderson
2021-10-15 4:10 ` [PATCH v5 56/67] target/sparc: Split out build_sfsr Richard Henderson
2021-10-15 4:10 ` [PATCH v5 57/67] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-10-15 4:10 ` [PATCH v5 58/67] accel/tcg: Report unaligned atomics for user-only Richard Henderson
2021-10-15 19:08 ` Warner Losh
2021-10-29 23:43 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 59/67] accel/tcg: Report unaligned load/store " Richard Henderson
2021-10-15 19:08 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 60/67] tcg: Add helper_unaligned_{ld, st} for user-only sigbus Richard Henderson
2021-10-15 19:09 ` Warner Losh
2021-10-29 23:44 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 61/67] linux-user: Handle BUS_ADRALN in host_signal_handler Richard Henderson
2021-10-29 23:46 ` Philippe Mathieu-Daudé
2021-10-15 4:10 ` [PATCH v5 62/67] linux-user: Split out do_prctl and subroutines Richard Henderson
2021-10-15 4:10 ` [PATCH v5 63/67] linux-user: Disable more prctl subcodes Richard Henderson
2021-10-15 4:10 ` [PATCH v5 64/67] linux-user: Add code for PR_GET/SET_UNALIGN Richard Henderson
2021-10-15 19:11 ` Warner Losh
2021-10-15 4:10 ` [PATCH v5 65/67] target/alpha: Implement prctl_unalign_sigbus Richard Henderson
2021-10-15 4:10 ` [PATCH v5 66/67] target/hppa: " Richard Henderson
2021-10-15 4:10 ` [PATCH v5 67/67] target/sh4: " Richard Henderson
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