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From: Warner Losh <imp@bsdimp.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Bin Meng <bin.meng@windriver.com>,
	Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Max Filippov <jcmvbkbc@gmail.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	Marek Vasut <marex@denx.de>,
	Yoshinori Sato <ysato@users.sourceforge.jp>,
	qemu-ppc <qemu-ppc@nongnu.org>,
	Artyom Tarasenko <atar4qemu@gmail.com>,
	Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Kyle Evans <kevans@freebsd.org>,
	Richard Henderson <richard.henderson@linaro.org>,
	Greg Kurz <groug@kaod.org>, qemu-arm <qemu-arm@nongnu.org>,
	Michael Rolnik <mrolnik@gmail.com>,
	Stafford Horne <shorne@gmail.com>,
	David Gibson <david@gibson.dropbear.id.au>,
	qemu-riscv@nongnu.org, Chris Wulff <crwulff@gmail.com>,
	Laurent Vivier <laurent@vivier.eu>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [RFC PATCH 04/24] accel/tcg: Rename user-mode do_interrupt hack as fake_user_exception
Date: Thu, 2 Sep 2021 14:14:12 -0600	[thread overview]
Message-ID: <CANCZdfqatDMjqzy86AmvZSd9WEqDuXuiapcj1kJxWgfifKo-SQ@mail.gmail.com> (raw)
In-Reply-To: <20210902151715.383678-5-f4bug@amsat.org>

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On Thu, Sep 2, 2021 at 9:17 AM Philippe Mathieu-Daudé <f4bug@amsat.org>
wrote:

> do_interrupt() is sysemu specific. However due to some X86
> specific hack, it is also used in user-mode emulation, which
> is why it couldn't be restricted to CONFIG_SOFTMMU (see the
> comment around added in commit 78271684719: "cpu: tcg_ops:
> move to tcg-cpu-ops.h, keep a pointer in CPUClass").
> Keep the hack but rename the handler as fake_user_exception()
> and restrict do_interrupt() to sysemu.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> RFC: Any better name / idea here?
>

Maybe user_mode_exception()? but I'm not sure that's better...


> ---
>  include/hw/core/tcg-cpu-ops.h | 22 ++++++++++++++--------
>  accel/tcg/cpu-exec.c          |  4 ++--
>  target/i386/tcg/tcg-cpu.c     |  6 ++++--
>  3 files changed, 20 insertions(+), 12 deletions(-)
>


Reviewed-by: Warner Losh <imp@bsdimp.com>



> diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
> index eab27d0c030..600f0349659 100644
> --- a/include/hw/core/tcg-cpu-ops.h
> +++ b/include/hw/core/tcg-cpu-ops.h
> @@ -37,14 +37,6 @@ struct TCGCPUOps {
>      void (*cpu_exec_exit)(CPUState *cpu);
>      /** @cpu_exec_interrupt: Callback for processing interrupts in
> cpu_exec */
>      bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
> -    /**
> -     * @do_interrupt: Callback for interrupt handling.
> -     *
> -     * note that this is in general SOFTMMU only, but it actually isn't
> -     * because of an x86 hack (accel/tcg/cpu-exec.c), so we cannot put it
> -     * in the SOFTMMU section in general.
> -     */
> -    void (*do_interrupt)(CPUState *cpu);
>      /**
>       * @tlb_fill: Handle a softmmu tlb miss or user-only address fault
>       *
> @@ -61,6 +53,20 @@ struct TCGCPUOps {
>      void (*debug_excp_handler)(CPUState *cpu);
>
>  #ifdef NEED_CPU_H
> +#if defined(CONFIG_USER_ONLY) && defined(TARGET_I386)
> +    /**
> +     * @fake_user_exception: Callback for 'fake exception' handling.
> +     *
> +     * Simulate 'fake exception' which will be handled outside the
> +     * cpu execution loop (hack for x86 user mode).
> +     */
> +    void (*fake_user_exception)(CPUState *cpu);
> +#else
> +    /**
> +     * @do_interrupt: Callback for interrupt handling.
> +     */
> +    void (*do_interrupt)(CPUState *cpu);
> +#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
>  #ifdef CONFIG_SOFTMMU
>      /**
>       * @do_transaction_failed: Callback for handling failed memory
> transactions
> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
> index e5c0ccd1a2a..3e387c944c5 100644
> --- a/accel/tcg/cpu-exec.c
> +++ b/accel/tcg/cpu-exec.c
> @@ -651,8 +651,8 @@ static inline bool cpu_handle_exception(CPUState *cpu,
> int *ret)
>             loop */
>  #if defined(TARGET_I386)
>          CPUClass *cc = CPU_GET_CLASS(cpu);
> -        cc->tcg_ops->do_interrupt(cpu);
> -#endif
> +        cc->tcg_ops->fake_user_exception(cpu);
> +#endif /* TARGET_I386 */
>          *ret = cpu->exception_index;
>          cpu->exception_index = -1;
>          return true;
> diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c
> index 93a79a57415..dce800a8953 100644
> --- a/target/i386/tcg/tcg-cpu.c
> +++ b/target/i386/tcg/tcg-cpu.c
> @@ -73,9 +73,11 @@ static const struct TCGCPUOps x86_tcg_ops = {
>      .cpu_exec_enter = x86_cpu_exec_enter,
>      .cpu_exec_exit = x86_cpu_exec_exit,
>      .cpu_exec_interrupt = x86_cpu_exec_interrupt,
> -    .do_interrupt = x86_cpu_do_interrupt,
>      .tlb_fill = x86_cpu_tlb_fill,
> -#ifndef CONFIG_USER_ONLY
> +#ifdef CONFIG_USER_ONLY
> +    .fake_user_exception = x86_cpu_do_interrupt,
> +#else
> +    .do_interrupt = x86_cpu_do_interrupt,
>      .debug_excp_handler = breakpoint_handler,
>      .debug_check_breakpoint = x86_debug_check_breakpoint,
>  #endif /* !CONFIG_USER_ONLY */
> --
> 2.31.1
>
>

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  reply	other threads:[~2021-09-02 20:15 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-02 15:16 [PATCH 00/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() to sysemu Philippe Mathieu-Daudé
2021-09-02 15:16 ` [PATCH 01/24] target/xtensa: Restrict do_transaction_failed() " Philippe Mathieu-Daudé
2021-09-02 20:09   ` Warner Losh
2021-09-03 18:54   ` Richard Henderson
2021-09-02 15:16 ` [PATCH 02/24] target/i386: Restrict sysemu-only fpu_helper helpers Philippe Mathieu-Daudé
2021-09-02 20:10   ` Warner Losh
2021-09-03 18:58   ` Richard Henderson
2021-09-02 15:16 ` [PATCH 03/24] target/i386: Simplify TARGET_X86_64 #ifdef'ry Philippe Mathieu-Daudé
2021-09-02 20:10   ` Warner Losh
2021-09-03 19:00   ` Richard Henderson
2021-09-02 15:16 ` [RFC PATCH 04/24] accel/tcg: Rename user-mode do_interrupt hack as fake_user_exception Philippe Mathieu-Daudé
2021-09-02 20:14   ` Warner Losh [this message]
2021-09-03 19:07   ` Richard Henderson
2021-09-04 23:26     ` Philippe Mathieu-Daudé
2021-09-02 15:16 ` [PATCH 05/24] accel/tcg: Assert most of cpu_handle_interrupt() is sysemu-specific Philippe Mathieu-Daudé
2021-09-03 19:08   ` Richard Henderson
2021-09-02 15:16 ` [PATCH 06/24] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu Philippe Mathieu-Daudé
2021-09-02 20:15   ` Warner Losh
2021-09-03 19:09   ` Richard Henderson
2021-09-02 15:16 ` [PATCH 07/24] target/arm: " Philippe Mathieu-Daudé
2021-09-02 20:16   ` Warner Losh
2021-09-03 19:10   ` Richard Henderson
2021-09-02 15:16 ` [PATCH 08/24] target/avr: " Philippe Mathieu-Daudé
2021-09-02 20:16   ` Warner Losh
2021-09-03 19:12   ` Richard Henderson
2021-09-03 20:47     ` Philippe Mathieu-Daudé
2021-09-03 20:50       ` Richard Henderson
2021-09-02 15:17 ` [PATCH 09/24] target/cris: " Philippe Mathieu-Daudé
2021-09-02 20:17   ` Warner Losh
2021-09-03 19:12   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 10/24] target/hppa: " Philippe Mathieu-Daudé
2021-09-02 20:17   ` Warner Losh
2021-09-03 19:14   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 11/24] target/i386: " Philippe Mathieu-Daudé
2021-09-02 20:18   ` Warner Losh
2021-09-03 19:15   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 12/24] target/m68k: " Philippe Mathieu-Daudé
2021-09-02 20:19   ` Warner Losh
2021-09-03 19:16   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 13/24] target/microblaze: " Philippe Mathieu-Daudé
2021-09-02 20:20   ` Warner Losh
2021-09-03 19:16   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 14/24] target/mips: " Philippe Mathieu-Daudé
2021-09-02 20:21   ` Warner Losh
2021-09-03 19:17   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 15/24] target/nios2: " Philippe Mathieu-Daudé
2021-09-02 20:22   ` Warner Losh
2021-09-03 19:17   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 16/24] target/openrisc: " Philippe Mathieu-Daudé
2021-09-02 20:24   ` Warner Losh
2021-09-04 23:40     ` Philippe Mathieu-Daudé
2021-09-03 19:18   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 17/24] target/ppc: " Philippe Mathieu-Daudé
2021-09-02 20:24   ` Warner Losh
2021-09-03  0:48   ` David Gibson
2021-09-03 19:19   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 18/24] target/riscv: " Philippe Mathieu-Daudé
2021-09-02 20:25   ` Warner Losh
2021-09-03 19:21   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 19/24] target/sh4: " Philippe Mathieu-Daudé
2021-09-02 20:25   ` Warner Losh
2021-09-03 19:22   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 20/24] target/sparc: " Philippe Mathieu-Daudé
2021-09-02 20:26   ` Warner Losh
2021-09-03 19:22   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 21/24] target/rx: " Philippe Mathieu-Daudé
2021-09-02 20:26   ` Warner Losh
2021-09-03 19:23   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 22/24] target/xtensa: " Philippe Mathieu-Daudé
2021-09-02 20:26   ` Warner Losh
2021-09-03 19:24   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 23/24] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() " Philippe Mathieu-Daudé
2021-09-03 19:26   ` Richard Henderson
2021-09-02 15:17 ` [PATCH 24/24] user: Remove cpu_get_pic_interrupt() stubs Philippe Mathieu-Daudé
2021-09-02 20:27   ` Warner Losh
2021-09-03 19:27   ` Richard Henderson

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