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boundary="00000000000002319e05ce686665" Received-SPF: none client-ip=2607:f8b0:4864:20::a31; envelope-from=wlosh@bsdimp.com; helo=mail-vk1-xa31.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?B?QWxleCBCZW5uw6ll?= , QEMU Developers , Laurent Vivier Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --00000000000002319e05ce686665 Content-Type: text/plain; charset="UTF-8" On Thu, Oct 14, 2021 at 10:11 PM Richard Henderson < richard.henderson@linaro.org> wrote: > Split host_signal_pc and host_signal_write out of user-exec.c. > Drop the *BSD code, to be re-created under bsd-user/ later. > > Signed-off-by: Richard Henderson > --- > linux-user/host/aarch64/host-signal.h | 74 ++++++++++++++++++++- > accel/tcg/user-exec.c | 94 +-------------------------- > 2 files changed, 74 insertions(+), 94 deletions(-) > Reviewed-by: Warner Losh > diff --git a/linux-user/host/aarch64/host-signal.h > b/linux-user/host/aarch64/host-signal.h > index f4b4d65031..02a55c3372 100644 > --- a/linux-user/host/aarch64/host-signal.h > +++ b/linux-user/host/aarch64/host-signal.h > @@ -1 +1,73 @@ > -#define HOST_SIGNAL_PLACEHOLDER > +/* > + * host-signal.h: signal info dependent on the host architecture > + * > + * Copyright (C) 2021 Linaro Limited > + * > + * This work is licensed under the terms of the GNU GPL, version 2 or > later. > + * See the COPYING file in the top-level directory. > + */ > + > +#ifndef AARCH64_HOST_SIGNAL_H > +#define AARCH64_HOST_SIGNAL_H > + > +/* Pre-3.16 kernel headers don't have these, so provide fallback > definitions */ > +#ifndef ESR_MAGIC > +#define ESR_MAGIC 0x45535201 > +struct esr_context { > + struct _aarch64_ctx head; > + uint64_t esr; > +}; > +#endif > + > +static inline struct _aarch64_ctx *first_ctx(ucontext_t *uc) > +{ > + return (struct _aarch64_ctx *)&uc->uc_mcontext.__reserved; > +} > + > +static inline struct _aarch64_ctx *next_ctx(struct _aarch64_ctx *hdr) > +{ > + return (struct _aarch64_ctx *)((char *)hdr + hdr->size); > +} > + > +static inline uintptr_t host_signal_pc(ucontext_t *uc) > +{ > + return uc->uc_mcontext.pc; > +} > + > +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) > +{ > + struct _aarch64_ctx *hdr; > + uint32_t insn; > + > + /* Find the esr_context, which has the WnR bit in it */ > + for (hdr = first_ctx(uc); hdr->magic; hdr = next_ctx(hdr)) { > + if (hdr->magic == ESR_MAGIC) { > + struct esr_context const *ec = (struct esr_context const > *)hdr; > + uint64_t esr = ec->esr; > + > + /* For data aborts ESR.EC is 0b10010x: then bit 6 is the WnR > bit */ > + return extract32(esr, 27, 5) == 0x12 && extract32(esr, 6, 1) > == 1; > + } > + } > + > + /* > + * Fall back to parsing instructions; will only be needed > + * for really ancient (pre-3.16) kernels. > + */ > + insn = *(uint32_t *)host_signal_pc(uc); > + > + return (insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */ > + || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */ > + || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */ > + || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */ > + || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */ > + || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */ > + || (insn & 0x3fc00000) == 0x3d800000 /* ... 128bit */ > + /* Ignore bits 10, 11 & 21, controlling indexing. */ > + || (insn & 0x3bc00000) == 0x38000000 /* C3.3.8-12 */ > + || (insn & 0x3fe00000) == 0x3c800000 /* ... 128bit */ > + /* Ignore bits 23 & 24, controlling indexing. */ > + || (insn & 0x3a400000) == 0x28000000; /* C3.3.7,14-16 */ > +} > + > +#endif > diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c > index 5656c654e1..0915eb7f95 100644 > --- a/accel/tcg/user-exec.c > +++ b/accel/tcg/user-exec.c > @@ -255,99 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong > addr, int size, > return size ? g2h(env_cpu(env), addr) : NULL; > } > > -#if defined(__aarch64__) > - > -#if defined(__NetBSD__) > - > -#include > -#include > - > -int cpu_signal_handler(int host_signum, void *pinfo, void *puc) > -{ > - ucontext_t *uc = puc; > - siginfo_t *si = pinfo; > - unsigned long pc; > - int is_write; > - uint32_t esr; > - > - pc = uc->uc_mcontext.__gregs[_REG_PC]; > - esr = si->si_trap; > - > - /* > - * siginfo_t::si_trap is the ESR value, for data aborts ESR.EC > - * is 0b10010x: then bit 6 is the WnR bit > - */ > - is_write = extract32(esr, 27, 5) == 0x12 && extract32(esr, 6, 1) == 1; > - return handle_cpu_signal(pc, si, is_write, &uc->uc_sigmask); > -} > - > -#else > - > -#ifndef ESR_MAGIC > -/* Pre-3.16 kernel headers don't have these, so provide fallback > definitions */ > -#define ESR_MAGIC 0x45535201 > -struct esr_context { > - struct _aarch64_ctx head; > - uint64_t esr; > -}; > -#endif > - > -static inline struct _aarch64_ctx *first_ctx(ucontext_t *uc) > -{ > - return (struct _aarch64_ctx *)&uc->uc_mcontext.__reserved; > -} > - > -static inline struct _aarch64_ctx *next_ctx(struct _aarch64_ctx *hdr) > -{ > - return (struct _aarch64_ctx *)((char *)hdr + hdr->size); > -} > - > -int cpu_signal_handler(int host_signum, void *pinfo, void *puc) > -{ > - siginfo_t *info = pinfo; > - ucontext_t *uc = puc; > - uintptr_t pc = uc->uc_mcontext.pc; > - bool is_write; > - struct _aarch64_ctx *hdr; > - struct esr_context const *esrctx = NULL; > - > - /* Find the esr_context, which has the WnR bit in it */ > - for (hdr = first_ctx(uc); hdr->magic; hdr = next_ctx(hdr)) { > - if (hdr->magic == ESR_MAGIC) { > - esrctx = (struct esr_context const *)hdr; > - break; > - } > - } > - > - if (esrctx) { > - /* For data aborts ESR.EC is 0b10010x: then bit 6 is the WnR bit > */ > - uint64_t esr = esrctx->esr; > - is_write = extract32(esr, 27, 5) == 0x12 && extract32(esr, 6, 1) > == 1; > - } else { > - /* > - * Fall back to parsing instructions; will only be needed > - * for really ancient (pre-3.16) kernels. > - */ > - uint32_t insn = *(uint32_t *)pc; > - > - is_write = ((insn & 0xbfff0000) == 0x0c000000 /* C3.3.1 */ > - || (insn & 0xbfe00000) == 0x0c800000 /* C3.3.2 */ > - || (insn & 0xbfdf0000) == 0x0d000000 /* C3.3.3 */ > - || (insn & 0xbfc00000) == 0x0d800000 /* C3.3.4 */ > - || (insn & 0x3f400000) == 0x08000000 /* C3.3.6 */ > - || (insn & 0x3bc00000) == 0x39000000 /* C3.3.13 */ > - || (insn & 0x3fc00000) == 0x3d800000 /* ... 128bit > */ > - /* Ignore bits 10, 11 & 21, controlling indexing. */ > - || (insn & 0x3bc00000) == 0x38000000 /* C3.3.8-12 */ > - || (insn & 0x3fe00000) == 0x3c800000 /* ... 128bit > */ > - /* Ignore bits 23 & 24, controlling indexing. */ > - || (insn & 0x3a400000) == 0x28000000); /* > C3.3.7,14-16 */ > - } > - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); > -} > -#endif > - > -#elif defined(__s390__) > +#if defined(__s390__) > > int cpu_signal_handler(int host_signum, void *pinfo, > void *puc) > -- > 2.25.1 > > --00000000000002319e05ce686665 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Thu, Oct 14, 2021 at 10:11 PM Rich= ard Henderson <richard.h= enderson@linaro.org> wrote:
Split host_signal_pc and host_signal_write out of user-e= xec.c.
Drop the *BSD code, to be re-created under bsd-user/ later.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
=C2=A0linux-user/host/aarch64/host-signal.h | 74 ++++++++++++++++++++-
=C2=A0accel/tcg/user-exec.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0| 94 +--------------------------
=C2=A02 files changed, 74 insertions(+), 94 deletions(-)

Reviewed-by: Warner Losh <imp@bsdimp.com>

=C2=A0
diff --git a/linux-user/host/aarch64/host-signal.h b/linux-user/host/aarch6= 4/host-signal.h
index f4b4d65031..02a55c3372 100644
--- a/linux-user/host/aarch64/host-signal.h
+++ b/linux-user/host/aarch64/host-signal.h
@@ -1 +1,73 @@
-#define HOST_SIGNAL_PLACEHOLDER
+/*
+ * host-signal.h: signal info dependent on the host architecture
+ *
+ * Copyright (C) 2021 Linaro Limited
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or late= r.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef AARCH64_HOST_SIGNAL_H
+#define AARCH64_HOST_SIGNAL_H
+
+/* Pre-3.16 kernel headers don't have these, so provide fallback defin= itions */
+#ifndef ESR_MAGIC
+#define ESR_MAGIC 0x45535201
+struct esr_context {
+=C2=A0 =C2=A0 struct _aarch64_ctx head;
+=C2=A0 =C2=A0 uint64_t esr;
+};
+#endif
+
+static inline struct _aarch64_ctx *first_ctx(ucontext_t *uc)
+{
+=C2=A0 =C2=A0 return (struct _aarch64_ctx *)&uc->uc_mcontext.__rese= rved;
+}
+
+static inline struct _aarch64_ctx *next_ctx(struct _aarch64_ctx *hdr)
+{
+=C2=A0 =C2=A0 return (struct _aarch64_ctx *)((char *)hdr + hdr->size);<= br> +}
+
+static inline uintptr_t host_signal_pc(ucontext_t *uc)
+{
+=C2=A0 =C2=A0 return uc->uc_mcontext.pc;
+}
+
+static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
+{
+=C2=A0 =C2=A0 struct _aarch64_ctx *hdr;
+=C2=A0 =C2=A0 uint32_t insn;
+
+=C2=A0 =C2=A0 /* Find the esr_context, which has the WnR bit in it */
+=C2=A0 =C2=A0 for (hdr =3D first_ctx(uc); hdr->magic; hdr =3D next_ctx(= hdr)) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (hdr->magic =3D=3D ESR_MAGIC) {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 struct esr_context const *ec =3D= (struct esr_context const *)hdr;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 uint64_t esr =3D ec->esr;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* For data aborts ESR.EC is 0b10010x: t= hen bit 6 is the WnR bit */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return extract32(esr, 27, 5) =3D= =3D 0x12 && extract32(esr, 6, 1) =3D=3D 1;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
+=C2=A0 =C2=A0 }
+
+=C2=A0 =C2=A0 /*
+=C2=A0 =C2=A0 =C2=A0* Fall back to parsing instructions; will only be need= ed
+=C2=A0 =C2=A0 =C2=A0* for really ancient (pre-3.16) kernels.
+=C2=A0 =C2=A0 =C2=A0*/
+=C2=A0 =C2=A0 insn =3D *(uint32_t *)host_signal_pc(uc);
+
+=C2=A0 =C2=A0 return (insn & 0xbfff0000) =3D=3D 0x0c000000=C2=A0 =C2= =A0/* C3.3.1 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0xbfe00000) =3D=3D 0x0c800000= =C2=A0 =C2=A0/* C3.3.2 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0xbfdf0000) =3D=3D 0x0d000000= =C2=A0 =C2=A0/* C3.3.3 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0xbfc00000) =3D=3D 0x0d800000= =C2=A0 =C2=A0/* C3.3.4 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0x3f400000) =3D=3D 0x08000000= =C2=A0 =C2=A0/* C3.3.6 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0x3bc00000) =3D=3D 0x39000000= =C2=A0 =C2=A0/* C3.3.13 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0x3fc00000) =3D=3D 0x3d800000= =C2=A0 =C2=A0/* ... 128bit */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Ignore bits 10, 11 & 21, controlling in= dexing.=C2=A0 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0x3bc00000) =3D=3D 0x38000000= =C2=A0 =C2=A0/* C3.3.8-12 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0x3fe00000) =3D=3D 0x3c800000= =C2=A0 =C2=A0/* ... 128bit */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Ignore bits 23 & 24, controlling indexi= ng.=C2=A0 */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 || (insn & 0x3a400000) =3D=3D 0x28000000; = /* C3.3.7,14-16 */
+}
+
+#endif
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 5656c654e1..0915eb7f95 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -255,99 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong add= r, int size,
=C2=A0 =C2=A0 =C2=A0return size ? g2h(env_cpu(env), addr) : NULL;
=C2=A0}

-#if defined(__aarch64__)
-
-#if defined(__NetBSD__)
-
-#include <ucontext.h>
-#include <sys/siginfo.h>
-
-int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
-{
-=C2=A0 =C2=A0 ucontext_t *uc =3D puc;
-=C2=A0 =C2=A0 siginfo_t *si =3D pinfo;
-=C2=A0 =C2=A0 unsigned long pc;
-=C2=A0 =C2=A0 int is_write;
-=C2=A0 =C2=A0 uint32_t esr;
-
-=C2=A0 =C2=A0 pc =3D uc->uc_mcontext.__gregs[_REG_PC];
-=C2=A0 =C2=A0 esr =3D si->si_trap;
-
-=C2=A0 =C2=A0 /*
-=C2=A0 =C2=A0 =C2=A0* siginfo_t::si_trap is the ESR value, for data aborts= ESR.EC<= br> -=C2=A0 =C2=A0 =C2=A0* is 0b10010x: then bit 6 is the WnR bit
-=C2=A0 =C2=A0 =C2=A0*/
-=C2=A0 =C2=A0 is_write =3D extract32(esr, 27, 5) =3D=3D 0x12 && ex= tract32(esr, 6, 1) =3D=3D 1;
-=C2=A0 =C2=A0 return handle_cpu_signal(pc, si, is_write, &uc->uc_si= gmask);
-}
-
-#else
-
-#ifndef ESR_MAGIC
-/* Pre-3.16 kernel headers don't have these, so provide fallback defin= itions */
-#define ESR_MAGIC 0x45535201
-struct esr_context {
-=C2=A0 =C2=A0 struct _aarch64_ctx head;
-=C2=A0 =C2=A0 uint64_t esr;
-};
-#endif
-
-static inline struct _aarch64_ctx *first_ctx(ucontext_t *uc)
-{
-=C2=A0 =C2=A0 return (struct _aarch64_ctx *)&uc->uc_mcontext.__rese= rved;
-}
-
-static inline struct _aarch64_ctx *next_ctx(struct _aarch64_ctx *hdr)
-{
-=C2=A0 =C2=A0 return (struct _aarch64_ctx *)((char *)hdr + hdr->size);<= br> -}
-
-int cpu_signal_handler(int host_signum, void *pinfo, void *puc)
-{
-=C2=A0 =C2=A0 siginfo_t *info =3D pinfo;
-=C2=A0 =C2=A0 ucontext_t *uc =3D puc;
-=C2=A0 =C2=A0 uintptr_t pc =3D uc->uc_mcontext.pc;
-=C2=A0 =C2=A0 bool is_write;
-=C2=A0 =C2=A0 struct _aarch64_ctx *hdr;
-=C2=A0 =C2=A0 struct esr_context const *esrctx =3D NULL;
-
-=C2=A0 =C2=A0 /* Find the esr_context, which has the WnR bit in it */
-=C2=A0 =C2=A0 for (hdr =3D first_ctx(uc); hdr->magic; hdr =3D next_ctx(= hdr)) {
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (hdr->magic =3D=3D ESR_MAGIC) {
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 esrctx =3D (struct esr_context c= onst *)hdr;
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
-=C2=A0 =C2=A0 }
-
-=C2=A0 =C2=A0 if (esrctx) {
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* For data aborts ESR.EC is 0b10010x: then bit 6 is t= he WnR bit */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint64_t esr =3D esrctx->esr;
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 is_write =3D extract32(esr, 27, 5) =3D=3D 0x12= && extract32(esr, 6, 1) =3D=3D 1;
-=C2=A0 =C2=A0 } else {
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 /*
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* Fall back to parsing instructions; wil= l only be needed
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* for really ancient (pre-3.16) kernels.=
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*/
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint32_t insn =3D *(uint32_t *)pc;
-
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 is_write =3D ((insn & 0xbfff0000) =3D=3D 0= x0c000000=C2=A0 =C2=A0/* C3.3.1 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0xbfe00000) =3D=3D 0x0c800000=C2=A0 =C2=A0/* C3.3.2 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0xbfdf0000) =3D=3D 0x0d000000=C2=A0 =C2=A0/* C3.3.3 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0xbfc00000) =3D=3D 0x0d800000=C2=A0 =C2=A0/* C3.3.4 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0x3f400000) =3D=3D 0x08000000=C2=A0 =C2=A0/* C3.3.6 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0x3bc00000) =3D=3D 0x39000000=C2=A0 =C2=A0/* C3.3.13 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0x3fc00000) =3D=3D 0x3d800000=C2=A0 =C2=A0/* ... 128bit */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* I= gnore bits 10, 11 & 21, controlling indexing.=C2=A0 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0x3bc00000) =3D=3D 0x38000000=C2=A0 =C2=A0/* C3.3.8-12 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0x3fe00000) =3D=3D 0x3c800000=C2=A0 =C2=A0/* ... 128bit */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* I= gnore bits 23 & 24, controlling indexing.=C2=A0 */
-=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 || (= insn & 0x3a400000) =3D=3D 0x28000000); /* C3.3.7,14-16 */
-=C2=A0 =C2=A0 }
-=C2=A0 =C2=A0 return handle_cpu_signal(pc, info, is_write, &uc->uc_= sigmask);
-}
-#endif
-
-#elif defined(__s390__)
+#if defined(__s390__)

=C2=A0int cpu_signal_handler(int host_signum, void *pinfo,
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 void *puc)
--
2.25.1

--00000000000002319e05ce686665--