From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52479) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqgH2-0003t8-Qf for qemu-devel@nongnu.org; Thu, 14 Apr 2016 08:21:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aqgH1-00019L-Rr for qemu-devel@nongnu.org; Thu, 14 Apr 2016 08:21:28 -0400 Received: from mail-vk0-x229.google.com ([2607:f8b0:400c:c05::229]:36113) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqgH1-00019F-MT for qemu-devel@nongnu.org; Thu, 14 Apr 2016 08:21:27 -0400 Received: by mail-vk0-x229.google.com with SMTP id c4so106848363vkb.3 for ; Thu, 14 Apr 2016 05:21:27 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <1458585728-3197-1-git-send-email-aurelio.remonda@tallertechnologies.com> Date: Thu, 14 Apr 2016 09:21:26 -0300 Message-ID: From: Aurelio Remonda Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PING][PATCH] Added the -m flag feature to stellaris boards List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: QEMU Developers Hello Peter, have you had a chance to look at this? On Mon, Mar 28, 2016 at 3:15 PM, Aurelio Remonda wrote: >>> #define NUM_IRQ_LINES 64 >>> +#define LM3S811EVB_DEFAULT_DC0 0x00001f00 /* Default value for dc0 sra= m_size half */ >>> +#define LM3S6965EVB_DEFAULT_DC0 0x0000ff00 /* Default value for dc0 sr= am_size half */ >> >> These don't seem to be the same as the default values we had previously = ? > > I thought it will be easier to see in hexadecimal rather than decimal, > these are ram_size just like > user-given are. > >>> + /* RAM size should be divided by 256 in order to get a valid 16 bi= ts dc0 value */ >>> + ram_size =3D (ram_size >> 8) - 1; >>> + >>> + if (ram_size > DC0_MAX_SRAM) { >>> + error_report("Requested RAM size is too big for this board. Th= e maximum allowed is 16M."); >>> + exit(EXIT_FAILURE); >>> + } >>> + >>> + board->dc0 |=3D ram_size << DC0_SRAM_SHIFT; >>> flash_size =3D (((board->dc0 & 0xffff) + 1) << 1) * 1024; >>> sram_size =3D ((board->dc0 >> 18) + 1) * 1024; >> >> Do you know why your DC0_SRAM_SHIFT is 16 but this line which >> calculates sram_size from board->dc0 is doing a shift by 18 ? > > DC0_SRAM_SHIFT will just place the ram_size, prevously calculated > based on the decimal ram_size > value, in the correct dc0 half. Then the sram_size will be calculated as = always. > >>> @@ -1391,6 +1405,7 @@ static void lm3s811evb_class_init(ObjectClass *oc= , void *data) >>> >>> mc->desc =3D "Stellaris LM3S811EVB"; >>> mc->init =3D lm3s811evb_init; >>> + mc->default_ram_size =3D LM3S811EVB_DEFAULT_DC0; >> >> The default_ram_size should be a size in bytes, not a DC0 value. > > As I said before, I thought it was easier to see ff00 rather than > 65280, or 1f00 instead of 7936. > These values are fixed as default values to match the dc0 default > value on each board. > > In the case of LM3S811EVB the value is aligned up and you get a ram > size of 8192 but your > dc0 will still be 0x001f001f. > > In the other board LM3S6965EVB the value is aligned up to a ram size > of 65536 but your dc0 > will be the default 0x00ff007f. > > Thank you. > -- > Aurelio Remonda > > Taller Technologies Argentina > > Software Engineer > > San Lorenzo 47, 3rd Floor, Office 5 > C=C3=B3rdoba, Argentina > Phone: +54-351-4217888 / 4218211 --=20 Aurelio Remonda Taller Technologies Argentina Software Engineer San Lorenzo 47, 3rd Floor, Office 5 C=C3=B3rdoba, Argentina Phone: +54-351-4217888 / 4218211