[Qemu-devel] [PATCH pic32 3/7] Fixed random index generation for TLBWR instruction. It was not quite random and did not skip Wired entries.

[Qemu-devel] [PATCH pic32 3/7] Fixed random index generation for TLBWR instruction. It was not quite random and did not skip Wired entries.

[Serge Vakulenko]

Signed-off-by: Serge Vakulenko <serge@vak.ru>
---
 hw/mips/cputimer.c | 18 +++++-------------
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
index 3d23c1b..ec0cffa 100644
--- a/hw/mips/cputimer.c
+++ b/hw/mips/cputimer.c
@@ -25,21 +25,13 @@
 #include "qemu/timer.h"
 #include "sysemu/kvm.h"

-#define TIMER_FREQ 100 * 1000 * 1000
-
-/* XXX: do not use a global */
+/* Generate a random TLB index.
+ * Skip wired entries. */
 uint32_t cpu_mips_get_random (CPUMIPSState *env)
 {
-    static uint32_t lfsr = 1;
-    static uint32_t prev_idx = 0;
-    uint32_t idx;
-    /* Don't return same value twice, so get another value */
-    do {
-        lfsr = (lfsr >> 1) ^ (-(lfsr & 1u) & 0xd0000001u);
-        idx = lfsr % (env->tlb->nb_tlb - env->CP0_Wired) + env->CP0_Wired;
-    } while (idx == prev_idx);
-    prev_idx = idx;
-    return idx;
+    env->CP0_Random = env->CP0_Wired +
+        random() % (env->tlb->nb_tlb - env->CP0_Wired);
+    return env->CP0_Random;
 }

 /* MIPS R4K timer */
--
1.9.1