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[209.85.208.181]) by smtp.gmail.com with ESMTPSA id r16-20020ac25a50000000b004984ab5956dsm809649lfn.202.2022.09.22.00.58.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 22 Sep 2022 00:58:44 -0700 (PDT) Received: by mail-lj1-f181.google.com with SMTP id q17so9946493lji.11; Thu, 22 Sep 2022 00:58:44 -0700 (PDT) X-Received: by 2002:a05:651c:508:b0:26c:7297:5aa7 with SMTP id o8-20020a05651c050800b0026c72975aa7mr252463ljp.93.1663833523834; Thu, 22 Sep 2022 00:58:43 -0700 (PDT) MIME-Version: 1.0 References: <20220922075232.33653-1-shentey@gmail.com> In-Reply-To: <20220922075232.33653-1-shentey@gmail.com> From: Frank Chang Date: Thu, 22 Sep 2022 15:58:32 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] hw/riscv/sifive_e: Fix inheritance of SiFiveEState To: Bernhard Beschow Cc: qemu-devel@nongnu.org, qemu-stable@nongnu.org, qemu-riscv@nongnu.org, Alistair Francis , Palmer Dabbelt , Bin Meng , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: multipart/alternative; boundary="00000000000027574605e93f6ec3" Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=frank.chang@sifive.com; helo=mail-lf1-x131.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --00000000000027574605e93f6ec3 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Bernhard, I think there's already a similar patch for this bug fix: https://www.mail-archive.com/qemu-devel@nongnu.org/msg905424.html Regards, Frank Chang On Thu, Sep 22, 2022 at 3:53 PM Bernhard Beschow wrote: > SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to > inherit from TYPE_MACHINE. This is an inconsistency which can cause > undefined behavior such as memory corruption. > > Change SiFiveEState to inherit from MachineState since it is registered > as a machine. > > Fixes: 0869490b1c ("riscv: sifive_e: Manually define the machine") > > Signed-off-by: Bernhard Beschow > Reviewed-by: Alistair Francis > Reviewed-by: Philippe Mathieu-Daud=C3=A9 > --- > include/hw/riscv/sifive_e.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h > index 83604da805..d738745925 100644 > --- a/include/hw/riscv/sifive_e.h > +++ b/include/hw/riscv/sifive_e.h > @@ -22,6 +22,7 @@ > #include "hw/riscv/riscv_hart.h" > #include "hw/riscv/sifive_cpu.h" > #include "hw/gpio/sifive_gpio.h" > +#include "hw/boards.h" > > #define TYPE_RISCV_E_SOC "riscv.sifive.e.soc" > #define RISCV_E_SOC(obj) \ > @@ -41,7 +42,7 @@ typedef struct SiFiveESoCState { > > typedef struct SiFiveEState { > /*< private >*/ > - SysBusDevice parent_obj; > + MachineState parent_obj; > > /*< public >*/ > SiFiveESoCState soc; > -- > 2.37.3 > > > --00000000000027574605e93f6ec3 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Bernhard,

I think there's alread= y a similar patch for this bug fix:
https://www.mail-archive.com/qemu= -devel@nongnu.org/msg905424.html

Regards,<= /div>
Frank Chang

On Thu, Sep 22, 2022 at 3:53 PM Bernhard Beschow= <shentey@gmail.com> wrote:<= br>
SiFiveEState inh= erits from SysBusDevice while it's TypeInfo claims it to
inherit from TYPE_MACHINE. This is an inconsistency which can cause
undefined behavior such as memory corruption.

Change SiFiveEState to inherit from MachineState since it is registered
as a machine.

Fixes: 0869490b1c ("riscv: sifive_e: Manually define the machine"= )

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daud=C3=A9 <f4bug@amsat.org>
---
=C2=A0include/hw/riscv/sifive_e.h | 3 ++-
=C2=A01 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h
index 83604da805..d738745925 100644
--- a/include/hw/riscv/sifive_e.h
+++ b/include/hw/riscv/sifive_e.h
@@ -22,6 +22,7 @@
=C2=A0#include "hw/riscv/riscv_hart.h"
=C2=A0#include "hw/riscv/sifive_cpu.h"
=C2=A0#include "hw/gpio/sifive_gpio.h"
+#include "hw/boards.h"

=C2=A0#define TYPE_RISCV_E_SOC "riscv.sifive.e.soc"
=C2=A0#define RISCV_E_SOC(obj) \
@@ -41,7 +42,7 @@ typedef struct SiFiveESoCState {

=C2=A0typedef struct SiFiveEState {
=C2=A0 =C2=A0 =C2=A0/*< private >*/
-=C2=A0 =C2=A0 SysBusDevice parent_obj;
+=C2=A0 =C2=A0 MachineState parent_obj;

=C2=A0 =C2=A0 =C2=A0/*< public >*/
=C2=A0 =C2=A0 =C2=A0SiFiveESoCState soc;
--
2.37.3


--00000000000027574605e93f6ec3--