From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38538) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQitO-0002lK-SO for qemu-devel@nongnu.org; Sat, 15 Aug 2015 17:21:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZQitN-0008Oq-JS for qemu-devel@nongnu.org; Sat, 15 Aug 2015 17:21:30 -0400 Received: from mail-wi0-x235.google.com ([2a00:1450:400c:c05::235]:38030) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQitN-0008Of-Bt for qemu-devel@nongnu.org; Sat, 15 Aug 2015 17:21:29 -0400 Received: by wicja10 with SMTP id ja10so49780126wic.1 for ; Sat, 15 Aug 2015 14:21:28 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: Date: Sat, 15 Aug 2015 14:21:28 -0700 Message-ID: From: Peter Crosthwaite Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v1 1/3] ahci: Separate the AHCI state structure into the header List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: Sai Pavan Boddu , Peter Maydell , Edgar Iglesias , "qemu-devel@nongnu.org Developers" , =?UTF-8?Q?Andreas_F=C3=A4rber?= On Mon, Jul 27, 2015 at 11:37 AM, Alistair Francis wrote: > Pull the AHCI state structure out into the header. This allows > other containers to access the struct. This is required to add > the device to modern SoC containers. > > Signed-off-by: Alistair Francis > Reviewed-by: Sai Pavan Boddu > --- > hw/ide/ahci.c | 13 ------------- > hw/ide/ahci.h | 14 ++++++++++++++ > 2 files changed, 14 insertions(+), 13 deletions(-) > > diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c > index 48749c1..02d85fa 100644 > --- a/hw/ide/ahci.c > +++ b/hw/ide/ahci.c > @@ -25,7 +25,6 @@ > #include > #include > #include > -#include > > #include "qemu/error-report.h" > #include "sysemu/block-backend.h" > @@ -1625,18 +1624,6 @@ const VMStateDescription vmstate_ahci = { > }, > }; > > -#define TYPE_SYSBUS_AHCI "sysbus-ahci" > -#define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI) > - > -typedef struct SysbusAHCIState { > - /*< private >*/ > - SysBusDevice parent_obj; > - /*< public >*/ > - > - AHCIState ahci; > - uint32_t num_ports; > -} SysbusAHCIState; > - > static const VMStateDescription vmstate_sysbus_ahci = { > .name = "sysbus-ahci", > .fields = (VMStateField[]) { > diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h > index 68d5074..5ab8ea4 100644 > --- a/hw/ide/ahci.h > +++ b/hw/ide/ahci.h > @@ -24,6 +24,8 @@ > #ifndef HW_IDE_AHCI_H > #define HW_IDE_AHCI_H > > +#include > + Odd that this is the only header. Out-of scope, but should this header be including the same for PCI? It uses PCIDevice * defs, so I am guessing it is relying on clients to pre-include the deps. Reviewed-by: Peter Crosthwaite Regards, Peter > #define AHCI_MEM_BAR_SIZE 0x1000 > #define AHCI_MAX_PORTS 32 > #define AHCI_MAX_SG 168 /* hardware max is 64K */ > @@ -369,4 +371,16 @@ void ahci_reset(AHCIState *s); > > void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); > > +#define TYPE_SYSBUS_AHCI "sysbus-ahci" > +#define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI) > + > +typedef struct SysbusAHCIState { > + /*< private >*/ > + SysBusDevice parent_obj; > + /*< public >*/ > + > + AHCIState ahci; > + uint32_t num_ports; > +} SysbusAHCIState; > + > #endif /* HW_IDE_AHCI_H */ > -- > 1.7.1 > >