* [PATCH] system/runstate.c: Add a newline character to correctly log guest errors
@ 2025-10-04 17:47 Alexander Gryanko
2025-10-05 18:58 ` [PATCH v2] " Alexander Gryanko
2025-10-05 22:21 ` xpahos
0 siblings, 2 replies; 15+ messages in thread
From: Alexander Gryanko @ 2025-10-04 17:47 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-trivial,
Александр Грянко
The pvpanic handler calls the qemu_system_guest_panicked
function with a NULL parameter, which results in the absence
of a newline character in the guest error log.
The qemu_system_guest_crashloaded function has no additional
logic, but also omits the newline character.
The qemu_system_guest_pvshutdown has no reporting in the
guest error log.
Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
---
system/runstate.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/system/runstate.c b/system/runstate.c
index 6178b0091a..8b4bf75cd6 100644
--- a/system/runstate.c
+++ b/system/runstate.c
@@ -674,18 +674,21 @@ void qemu_system_guest_panicked(GuestPanicInformation *info)
}
qapi_free_GuestPanicInformation(info);
+ } else {
+ qemu_log_mask(LOG_GUEST_ERROR, "\n");
}
}
void qemu_system_guest_crashloaded(GuestPanicInformation *info)
{
- qemu_log_mask(LOG_GUEST_ERROR, "Guest crash loaded");
+ qemu_log_mask(LOG_GUEST_ERROR, "Guest crash loaded\n");
qapi_event_send_guest_crashloaded(GUEST_PANIC_ACTION_RUN, info);
qapi_free_GuestPanicInformation(info);
}
void qemu_system_guest_pvshutdown(void)
{
+ qemu_log_mask(LOG_GUEST_ERROR, "Guest shutdown requested\n");
qapi_event_send_guest_pvshutdown();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
---
base-commit: 81e3121bef89bcd3ccb261899e5a36246199065d
change-id: 20251004-add-newline-guest-error-log-62d68638b28c
Best regards,
--
Alexander Gryanko <xpahos@gmail.com>
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH] hw/arm: add pvpanic mmio device for arm
@ 2025-10-04 20:19 Alexander Gryanko
2025-10-05 20:16 ` [PATCH v2] " xpahos
` (3 more replies)
0 siblings, 4 replies; 15+ messages in thread
From: Alexander Gryanko @ 2025-10-04 20:19 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, qemu-arm, qemu-trivial,
Александр Грянко
Currently, pvpanic is available in three device types: ISA,
MMIO, and PCI. For early stages of system initialisation
before PCI enumeration, only ISA and MMIO are suitable.
ISA is specific to the x86 platform; only MMIO devices
can be used for ARM. It is not possible to specify a
device as on the x86 platform (-device pvpanic); the
only possible way is to add an MMIO device to the dtb,
which can be implemented by manually adding new functions
to the QEMU code, as was done in the VMApple implementation.
Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
---
hw/arm/virt.c | 25 +++++++++++++++++++++++++
include/hw/arm/virt.h | 1 +
2 files changed, 26 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 02209fadcf..1059584b67 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -39,6 +39,7 @@
#include "hw/arm/virt.h"
#include "hw/block/flash.h"
#include "hw/display/ramfb.h"
+#include "hw/misc/pvpanic.h"
#include "net/net.h"
#include "system/device_tree.h"
#include "system/numa.h"
@@ -182,6 +183,7 @@ static const MemMapEntry base_memmap[] = {
[VIRT_UART0] = { 0x09000000, 0x00001000 },
[VIRT_RTC] = { 0x09010000, 0x00001000 },
[VIRT_FW_CFG] = { 0x09020000, 0x00000018 },
+ [VIRT_PVPANIC] = { 0x09021000, 0x00000002 },
[VIRT_GPIO] = { 0x09030000, 0x00001000 },
[VIRT_UART1] = { 0x09040000, 0x00001000 },
[VIRT_SMMU] = { 0x09050000, SMMU_IO_LEN },
@@ -276,6 +278,27 @@ static bool ns_el2_virt_timer_present(void)
arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu);
}
+static void create_pvpanic(VirtMachineState *vms)
+{
+ char *nodename;
+ MachineState *ms = MACHINE(vms);
+ DeviceState *dev = qdev_new(TYPE_PVPANIC_MMIO_DEVICE);
+ SysBusDevice *s = SYS_BUS_DEVICE(dev);
+
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_realize_and_unref(s, &error_fatal);
+ sysbus_mmio_map(s, 0, base);
+
+ nodename = g_strdup_printf("/pvpanic@%" PRIx64, base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
+ 2, base, 2, size);
+}
+
static void create_fdt(VirtMachineState *vms)
{
MachineState *ms = MACHINE(vms);
@@ -2498,6 +2521,8 @@ static void machvirt_init(MachineState *machine)
create_pcie(vms);
create_cxl_host_reg_region(vms);
+ create_pvpanic(vms);
+
if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
vms->acpi_dev = create_acpi_ged(vms);
} else {
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index ea2cff05b0..39bf07c9c1 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -81,6 +81,7 @@ enum {
VIRT_NVDIMM_ACPI,
VIRT_PVTIME,
VIRT_ACPI_PCIHP,
+ VIRT_PVPANIC,
VIRT_LOWMEMMAP_LAST,
};
---
base-commit: bd6aa0d1e59d71218c3eee055bc8d222c6e1a628
change-id: 20251004-arm-pvpanic-84a7d7b67d8d
Best regards,
--
Alexander Gryanko <xpahos@gmail.com>
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2] system/runstate.c: Add a newline character to correctly log guest errors
2025-10-04 17:47 [PATCH] system/runstate.c: Add a newline character to correctly log guest errors Alexander Gryanko
@ 2025-10-05 18:58 ` Alexander Gryanko
2025-10-05 22:21 ` xpahos
1 sibling, 0 replies; 15+ messages in thread
From: Alexander Gryanko @ 2025-10-05 18:58 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, qemu-trivial, Alexander Gryanko
From: Alexander Gryanko <xpahos@gmail.com>
The pvpanic handler calls the qemu_system_guest_panicked
function with a NULL parameter, which results in the absence
of a newline character in the guest error log.
The qemu_system_guest_crashloaded function has no additional
logic, but also omits the newline character.
The qemu_system_guest_pvshutdown has no reporting in the
guest error log.
Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
---
system/runstate.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/system/runstate.c b/system/runstate.c
index 6178b0091a..8b4bf75cd6 100644
--- a/system/runstate.c
+++ b/system/runstate.c
@@ -674,18 +674,21 @@ void qemu_system_guest_panicked(GuestPanicInformation *info)
}
qapi_free_GuestPanicInformation(info);
+ } else {
+ qemu_log_mask(LOG_GUEST_ERROR, "\n");
}
}
void qemu_system_guest_crashloaded(GuestPanicInformation *info)
{
- qemu_log_mask(LOG_GUEST_ERROR, "Guest crash loaded");
+ qemu_log_mask(LOG_GUEST_ERROR, "Guest crash loaded\n");
qapi_event_send_guest_crashloaded(GUEST_PANIC_ACTION_RUN, info);
qapi_free_GuestPanicInformation(info);
}
void qemu_system_guest_pvshutdown(void)
{
+ qemu_log_mask(LOG_GUEST_ERROR, "Guest shutdown requested\n");
qapi_event_send_guest_pvshutdown();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
---
base-commit: 81e3121bef89bcd3ccb261899e5a36246199065d
change-id: 20251004-add-newline-guest-error-log-62d68638b28c
Best regards,
--
Alexander Gryanko <xpahos@gmail.com>
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2] hw/arm: add pvpanic mmio device for arm
2025-10-04 20:19 [PATCH] hw/arm: add pvpanic mmio device for arm Alexander Gryanko
@ 2025-10-05 20:16 ` xpahos
2025-10-05 22:50 ` xpahos
` (2 subsequent siblings)
3 siblings, 0 replies; 15+ messages in thread
From: xpahos @ 2025-10-05 20:16 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, qemu-arm, Alexander Gryanko
From: Alexander Gryanko <xpahos@gmail.com>
Currently, pvpanic is available in three device types: ISA,
MMIO, and PCI. For early stages of system initialisation
before PCI enumeration, only ISA and MMIO are suitable.
ISA is specific to the x86 platform; only MMIO devices
can be used for ARM. It is not possible to specify a
device as on the x86 platform (-device pvpanic); the
only possible way is to add an MMIO device to the dtb,
which can be implemented by manually adding new functions
to the QEMU code, as was done in the VMApple implementation.
Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
---
hw/arm/virt.c | 26 ++++++++++++++++++++++++++
include/hw/arm/virt.h | 1 +
2 files changed, 27 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 02209fadcf..78e466f935 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -39,6 +39,7 @@
#include "hw/arm/virt.h"
#include "hw/block/flash.h"
#include "hw/display/ramfb.h"
+#include "hw/misc/pvpanic.h"
#include "net/net.h"
#include "system/device_tree.h"
#include "system/numa.h"
@@ -182,6 +183,7 @@ static const MemMapEntry base_memmap[] = {
[VIRT_UART0] = { 0x09000000, 0x00001000 },
[VIRT_RTC] = { 0x09010000, 0x00001000 },
[VIRT_FW_CFG] = { 0x09020000, 0x00000018 },
+ [VIRT_PVPANIC] = { 0x09021000, 0x00000002 },
[VIRT_GPIO] = { 0x09030000, 0x00001000 },
[VIRT_UART1] = { 0x09040000, 0x00001000 },
[VIRT_SMMU] = { 0x09050000, SMMU_IO_LEN },
@@ -276,6 +278,28 @@ static bool ns_el2_virt_timer_present(void)
arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu);
}
+static void create_pvpanic(VirtMachineState *vms)
+{
+ char *nodename;
+ MachineState *ms = MACHINE(vms);
+ DeviceState *dev = qdev_new(TYPE_PVPANIC_MMIO_DEVICE);
+ SysBusDevice *s = SYS_BUS_DEVICE(dev);
+
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_realize_and_unref(s, &error_fatal);
+ sysbus_mmio_map(s, 0, base);
+
+ nodename = g_strdup_printf("/pvpanic@%" PRIx64, base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
+ 2, base, 2, size);
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
MachineState *ms = MACHINE(vms);
@@ -2498,6 +2522,8 @@ static void machvirt_init(MachineState *machine)
create_pcie(vms);
create_cxl_host_reg_region(vms);
+ create_pvpanic(vms);
+
if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
vms->acpi_dev = create_acpi_ged(vms);
} else {
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index ea2cff05b0..39bf07c9c1 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -81,6 +81,7 @@ enum {
VIRT_NVDIMM_ACPI,
VIRT_PVTIME,
VIRT_ACPI_PCIHP,
+ VIRT_PVPANIC,
VIRT_LOWMEMMAP_LAST,
};
---
base-commit: bd6aa0d1e59d71218c3eee055bc8d222c6e1a628
change-id: 20251005-arm-pvpanic-8e3e8fd05e95
Best regards,
--
Alexander Gryanko <xpahos@gmail.com>
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2] system/runstate.c: Add a newline character to correctly log guest errors
2025-10-04 17:47 [PATCH] system/runstate.c: Add a newline character to correctly log guest errors Alexander Gryanko
2025-10-05 18:58 ` [PATCH v2] " Alexander Gryanko
@ 2025-10-05 22:21 ` xpahos
2025-10-05 22:27 ` [PATCH v2] hw/arm: add pvpanic mmio device for arm xpahos
1 sibling, 1 reply; 15+ messages in thread
From: xpahos @ 2025-10-05 22:21 UTC (permalink / raw)
To: qemu-devel; +Cc: pbonzini, qemu-trivial, Alexander Gryanko
From: Alexander Gryanko <xpahos@gmail.com>
The pvpanic handler calls the qemu_system_guest_panicked
function with a NULL parameter, which results in the absence
of a newline character in the guest error log.
The qemu_system_guest_crashloaded function has no additional
logic, but also omits the newline character.
The qemu_system_guest_pvshutdown has no reporting in the
guest error log.
Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
---
system/runstate.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/system/runstate.c b/system/runstate.c
index 6178b0091a..8b4bf75cd6 100644
--- a/system/runstate.c
+++ b/system/runstate.c
@@ -674,18 +674,21 @@ void qemu_system_guest_panicked(GuestPanicInformation *info)
}
qapi_free_GuestPanicInformation(info);
+ } else {
+ qemu_log_mask(LOG_GUEST_ERROR, "\n");
}
}
void qemu_system_guest_crashloaded(GuestPanicInformation *info)
{
- qemu_log_mask(LOG_GUEST_ERROR, "Guest crash loaded");
+ qemu_log_mask(LOG_GUEST_ERROR, "Guest crash loaded\n");
qapi_event_send_guest_crashloaded(GUEST_PANIC_ACTION_RUN, info);
qapi_free_GuestPanicInformation(info);
}
void qemu_system_guest_pvshutdown(void)
{
+ qemu_log_mask(LOG_GUEST_ERROR, "Guest shutdown requested\n");
qapi_event_send_guest_pvshutdown();
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
}
---
base-commit: 81e3121bef89bcd3ccb261899e5a36246199065d
change-id: 20251004-add-newline-guest-error-log-62d68638b28c
Best regards,
--
Alexander Gryanko <xpahos@gmail.com>
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2] hw/arm: add pvpanic mmio device for arm
2025-10-05 22:21 ` xpahos
@ 2025-10-05 22:27 ` xpahos
0 siblings, 0 replies; 15+ messages in thread
From: xpahos @ 2025-10-05 22:27 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, qemu-arm, Alexander Gryanko
From: Alexander Gryanko <xpahos@gmail.com>
Currently, pvpanic is available in three device types: ISA,
MMIO, and PCI. For early stages of system initialisation
before PCI enumeration, only ISA and MMIO are suitable.
ISA is specific to the x86 platform; only MMIO devices
can be used for ARM. It is not possible to specify a
device as on the x86 platform (-device pvpanic); the
only possible way is to add an MMIO device to the dtb,
which can be implemented by manually adding new functions
to the QEMU code, as was done in the VMApple implementation.
Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
---
hw/arm/virt.c | 26 ++++++++++++++++++++++++++
include/hw/arm/virt.h | 1 +
2 files changed, 27 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 02209fadcf..78e466f935 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -39,6 +39,7 @@
#include "hw/arm/virt.h"
#include "hw/block/flash.h"
#include "hw/display/ramfb.h"
+#include "hw/misc/pvpanic.h"
#include "net/net.h"
#include "system/device_tree.h"
#include "system/numa.h"
@@ -182,6 +183,7 @@ static const MemMapEntry base_memmap[] = {
[VIRT_UART0] = { 0x09000000, 0x00001000 },
[VIRT_RTC] = { 0x09010000, 0x00001000 },
[VIRT_FW_CFG] = { 0x09020000, 0x00000018 },
+ [VIRT_PVPANIC] = { 0x09021000, 0x00000002 },
[VIRT_GPIO] = { 0x09030000, 0x00001000 },
[VIRT_UART1] = { 0x09040000, 0x00001000 },
[VIRT_SMMU] = { 0x09050000, SMMU_IO_LEN },
@@ -276,6 +278,28 @@ static bool ns_el2_virt_timer_present(void)
arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu);
}
+static void create_pvpanic(VirtMachineState *vms)
+{
+ char *nodename;
+ MachineState *ms = MACHINE(vms);
+ DeviceState *dev = qdev_new(TYPE_PVPANIC_MMIO_DEVICE);
+ SysBusDevice *s = SYS_BUS_DEVICE(dev);
+
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_realize_and_unref(s, &error_fatal);
+ sysbus_mmio_map(s, 0, base);
+
+ nodename = g_strdup_printf("/pvpanic@%" PRIx64, base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
+ 2, base, 2, size);
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
MachineState *ms = MACHINE(vms);
@@ -2498,6 +2522,8 @@ static void machvirt_init(MachineState *machine)
create_pcie(vms);
create_cxl_host_reg_region(vms);
+ create_pvpanic(vms);
+
if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
vms->acpi_dev = create_acpi_ged(vms);
} else {
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index ea2cff05b0..39bf07c9c1 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -81,6 +81,7 @@ enum {
VIRT_NVDIMM_ACPI,
VIRT_PVTIME,
VIRT_ACPI_PCIHP,
+ VIRT_PVPANIC,
VIRT_LOWMEMMAP_LAST,
};
---
base-commit: bd6aa0d1e59d71218c3eee055bc8d222c6e1a628
change-id: 20251005-arm-pvpanic-8e3e8fd05e95
Best regards,
--
Alexander Gryanko <xpahos@gmail.com>
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2] hw/arm: add pvpanic mmio device for arm
2025-10-04 20:19 [PATCH] hw/arm: add pvpanic mmio device for arm Alexander Gryanko
2025-10-05 20:16 ` [PATCH v2] " xpahos
@ 2025-10-05 22:50 ` xpahos
2025-10-06 10:41 ` [PATCH] " Peter Maydell
2025-10-07 13:11 ` Igor Mammedov
3 siblings, 0 replies; 15+ messages in thread
From: xpahos @ 2025-10-05 22:50 UTC (permalink / raw)
To: qemu-devel; +Cc: peter.maydell, qemu-arm, Alexander Gryanko
From: Alexander Gryanko <xpahos@gmail.com>
Currently, pvpanic is available in three device types: ISA,
MMIO, and PCI. For early stages of system initialisation
before PCI enumeration, only ISA and MMIO are suitable.
ISA is specific to the x86 platform; only MMIO devices
can be used for ARM. It is not possible to specify a
device as on the x86 platform (-device pvpanic); the
only possible way is to add an MMIO device to the dtb,
which can be implemented by manually adding new functions
to the QEMU code, as was done in the VMApple implementation.
Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
---
hw/arm/virt.c | 26 ++++++++++++++++++++++++++
include/hw/arm/virt.h | 1 +
2 files changed, 27 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 02209fadcf..78e466f935 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -39,6 +39,7 @@
#include "hw/arm/virt.h"
#include "hw/block/flash.h"
#include "hw/display/ramfb.h"
+#include "hw/misc/pvpanic.h"
#include "net/net.h"
#include "system/device_tree.h"
#include "system/numa.h"
@@ -182,6 +183,7 @@ static const MemMapEntry base_memmap[] = {
[VIRT_UART0] = { 0x09000000, 0x00001000 },
[VIRT_RTC] = { 0x09010000, 0x00001000 },
[VIRT_FW_CFG] = { 0x09020000, 0x00000018 },
+ [VIRT_PVPANIC] = { 0x09021000, 0x00000002 },
[VIRT_GPIO] = { 0x09030000, 0x00001000 },
[VIRT_UART1] = { 0x09040000, 0x00001000 },
[VIRT_SMMU] = { 0x09050000, SMMU_IO_LEN },
@@ -276,6 +278,28 @@ static bool ns_el2_virt_timer_present(void)
arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu);
}
+static void create_pvpanic(VirtMachineState *vms)
+{
+ char *nodename;
+ MachineState *ms = MACHINE(vms);
+ DeviceState *dev = qdev_new(TYPE_PVPANIC_MMIO_DEVICE);
+ SysBusDevice *s = SYS_BUS_DEVICE(dev);
+
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_realize_and_unref(s, &error_fatal);
+ sysbus_mmio_map(s, 0, base);
+
+ nodename = g_strdup_printf("/pvpanic@%" PRIx64, base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
+ 2, base, 2, size);
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
MachineState *ms = MACHINE(vms);
@@ -2498,6 +2522,8 @@ static void machvirt_init(MachineState *machine)
create_pcie(vms);
create_cxl_host_reg_region(vms);
+ create_pvpanic(vms);
+
if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
vms->acpi_dev = create_acpi_ged(vms);
} else {
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index ea2cff05b0..39bf07c9c1 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -81,6 +81,7 @@ enum {
VIRT_NVDIMM_ACPI,
VIRT_PVTIME,
VIRT_ACPI_PCIHP,
+ VIRT_PVPANIC,
VIRT_LOWMEMMAP_LAST,
};
---
base-commit: bd6aa0d1e59d71218c3eee055bc8d222c6e1a628
change-id: 20251005-arm-pvpanic-8e3e8fd05e95
Best regards,
--
Alexander Gryanko <xpahos@gmail.com>
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH] hw/arm: add pvpanic mmio device for arm
2025-10-04 20:19 [PATCH] hw/arm: add pvpanic mmio device for arm Alexander Gryanko
2025-10-05 20:16 ` [PATCH v2] " xpahos
2025-10-05 22:50 ` xpahos
@ 2025-10-06 10:41 ` Peter Maydell
2025-10-06 11:52 ` Alexander Gryanko
2025-10-07 13:11 ` Igor Mammedov
3 siblings, 1 reply; 15+ messages in thread
From: Peter Maydell @ 2025-10-06 10:41 UTC (permalink / raw)
To: Alexander Gryanko; +Cc: qemu-devel, qemu-arm, qemu-trivial
On Sat, 4 Oct 2025 at 21:19, Alexander Gryanko <xpahos@gmail.com> wrote:
>
> Currently, pvpanic is available in three device types: ISA,
> MMIO, and PCI. For early stages of system initialisation
> before PCI enumeration, only ISA and MMIO are suitable.
> ISA is specific to the x86 platform; only MMIO devices
> can be used for ARM. It is not possible to specify a
> device as on the x86 platform (-device pvpanic); the
> only possible way is to add an MMIO device to the dtb,
> which can be implemented by manually adding new functions
> to the QEMU code, as was done in the VMApple implementation.
No, thank you. I don't want to add more devices to "virt"
than we have to. There is a PCI pvpanic device -- use
that. Yes, you might have to do PCI enumeration in software.
thanks
-- PMM
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] hw/arm: add pvpanic mmio device for arm
2025-10-06 10:41 ` [PATCH] " Peter Maydell
@ 2025-10-06 11:52 ` Alexander Gryanko
2025-10-06 12:03 ` Peter Maydell
0 siblings, 1 reply; 15+ messages in thread
From: Alexander Gryanko @ 2025-10-06 11:52 UTC (permalink / raw)
To: Peter Maydell; +Cc: qemu-devel, qemu-arm, qemu-trivial
Would it be acceptable to add a new device like uefi-vars-sysbus that can connect to the sysbus?
> On 6 Oct 2025, at 13:41, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Sat, 4 Oct 2025 at 21:19, Alexander Gryanko <xpahos@gmail.com> wrote:
>>
>> Currently, pvpanic is available in three device types: ISA,
>> MMIO, and PCI. For early stages of system initialisation
>> before PCI enumeration, only ISA and MMIO are suitable.
>> ISA is specific to the x86 platform; only MMIO devices
>> can be used for ARM. It is not possible to specify a
>> device as on the x86 platform (-device pvpanic); the
>> only possible way is to add an MMIO device to the dtb,
>> which can be implemented by manually adding new functions
>> to the QEMU code, as was done in the VMApple implementation.
>
> No, thank you. I don't want to add more devices to "virt"
> than we have to. There is a PCI pvpanic device -- use
> that. Yes, you might have to do PCI enumeration in software.
>
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] hw/arm: add pvpanic mmio device for arm
2025-10-06 11:52 ` Alexander Gryanko
@ 2025-10-06 12:03 ` Peter Maydell
0 siblings, 0 replies; 15+ messages in thread
From: Peter Maydell @ 2025-10-06 12:03 UTC (permalink / raw)
To: Alexander Gryanko; +Cc: qemu-devel, qemu-arm, qemu-trivial
On Mon, 6 Oct 2025 at 12:52, Alexander Gryanko <xpahos@gmail.com> wrote:
>
> Would it be acceptable to add a new device like uefi-vars-sysbus that can connect to the sysbus?
I'm not a fan of the dynamic-sysbus mechanism either.
We end up using it for annoying cases where there is
no way to use cleanly dynamically pluggable probeable
bus for something. For pvpanic, there is a PCI pvpanic
device, and PCI is dynamically pluggable and probeable
in software.
thanks
-- PMM
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] hw/arm: add pvpanic mmio device for arm
2025-10-04 20:19 [PATCH] hw/arm: add pvpanic mmio device for arm Alexander Gryanko
` (2 preceding siblings ...)
2025-10-06 10:41 ` [PATCH] " Peter Maydell
@ 2025-10-07 13:11 ` Igor Mammedov
2025-10-09 13:25 ` Alexander Gryanko
3 siblings, 1 reply; 15+ messages in thread
From: Igor Mammedov @ 2025-10-07 13:11 UTC (permalink / raw)
To: Alexander Gryanko; +Cc: qemu-devel, Peter Maydell, qemu-arm, qemu-trivial
On Sat, 4 Oct 2025 23:19:09 +0300
Alexander Gryanko <xpahos@gmail.com> wrote:
> Currently, pvpanic is available in three device types: ISA,
> MMIO, and PCI. For early stages of system initialisation
> before PCI enumeration, only ISA and MMIO are suitable.
> ISA is specific to the x86 platform; only MMIO devices
> can be used for ARM. It is not possible to specify a
> device as on the x86 platform (-device pvpanic); the
perhaps ARM folsk know better, don't we have some
user create-able sysbus devices? Can it be implemented
as such, so we would avoid creating built-in device?
> only possible way is to add an MMIO device to the dtb,
> which can be implemented by manually adding new functions
> to the QEMU code, as was done in the VMApple implementation.
>
> Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
> ---
> hw/arm/virt.c | 25 +++++++++++++++++++++++++
> include/hw/arm/virt.h | 1 +
> 2 files changed, 26 insertions(+)
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 02209fadcf..1059584b67 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -39,6 +39,7 @@
> #include "hw/arm/virt.h"
> #include "hw/block/flash.h"
> #include "hw/display/ramfb.h"
> +#include "hw/misc/pvpanic.h"
> #include "net/net.h"
> #include "system/device_tree.h"
> #include "system/numa.h"
> @@ -182,6 +183,7 @@ static const MemMapEntry base_memmap[] = {
> [VIRT_UART0] = { 0x09000000, 0x00001000 },
> [VIRT_RTC] = { 0x09010000, 0x00001000 },
> [VIRT_FW_CFG] = { 0x09020000, 0x00000018 },
> + [VIRT_PVPANIC] = { 0x09021000, 0x00000002 },
> [VIRT_GPIO] = { 0x09030000, 0x00001000 },
> [VIRT_UART1] = { 0x09040000, 0x00001000 },
> [VIRT_SMMU] = { 0x09050000, SMMU_IO_LEN },
> @@ -276,6 +278,27 @@ static bool ns_el2_virt_timer_present(void)
> arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu);
> }
>
> +static void create_pvpanic(VirtMachineState *vms)
> +{
> + char *nodename;
> + MachineState *ms = MACHINE(vms);
> + DeviceState *dev = qdev_new(TYPE_PVPANIC_MMIO_DEVICE);
> + SysBusDevice *s = SYS_BUS_DEVICE(dev);
> +
> + hwaddr base = vms->memmap[VIRT_PVPANIC].base;
> + hwaddr size = vms->memmap[VIRT_PVPANIC].size;
> +
> + sysbus_realize_and_unref(s, &error_fatal);
> + sysbus_mmio_map(s, 0, base);
> +
> + nodename = g_strdup_printf("/pvpanic@%" PRIx64, base);
> + qemu_fdt_add_subnode(ms->fdt, nodename);
> + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
> + "qemu,pvpanic-mmio");
> + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
> + 2, base, 2, size);
> +}
> +
> static void create_fdt(VirtMachineState *vms)
> {
> MachineState *ms = MACHINE(vms);
> @@ -2498,6 +2521,8 @@ static void machvirt_init(MachineState *machine)
> create_pcie(vms);
> create_cxl_host_reg_region(vms);
>
> + create_pvpanic(vms);
given that virt is versioned machine type,
we probably need a compat knob to disable it's creation on old machine types
> +
> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
> vms->acpi_dev = create_acpi_ged(vms);
> } else {
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index ea2cff05b0..39bf07c9c1 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -81,6 +81,7 @@ enum {
> VIRT_NVDIMM_ACPI,
> VIRT_PVTIME,
> VIRT_ACPI_PCIHP,
> + VIRT_PVPANIC,
> VIRT_LOWMEMMAP_LAST,
> };
>
>
> ---
> base-commit: bd6aa0d1e59d71218c3eee055bc8d222c6e1a628
> change-id: 20251004-arm-pvpanic-84a7d7b67d8d
>
> Best regards,
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] hw/arm: add pvpanic mmio device for arm
2025-10-07 13:11 ` Igor Mammedov
@ 2025-10-09 13:25 ` Alexander Gryanko
2025-10-09 13:29 ` Peter Maydell
0 siblings, 1 reply; 15+ messages in thread
From: Alexander Gryanko @ 2025-10-09 13:25 UTC (permalink / raw)
To: Igor Mammedov; +Cc: qemu-devel, Peter Maydell, qemu-arm, qemu-trivial
> On 7 Oct 2025, at 16:11, Igor Mammedov <imammedo@redhat.com> wrote:
>
> On Sat, 4 Oct 2025 23:19:09 +0300
> Alexander Gryanko <xpahos@gmail.com> wrote:
>
>> Currently, pvpanic is available in three device types: ISA,
>> MMIO, and PCI. For early stages of system initialisation
>> before PCI enumeration, only ISA and MMIO are suitable.
>> ISA is specific to the x86 platform; only MMIO devices
>> can be used for ARM. It is not possible to specify a
>> device as on the x86 platform (-device pvpanic); the
>
> perhaps ARM folsk know better, don't we have some
> user create-able sysbus devices? Can it be implemented
> as such, so we would avoid creating built-in device?
As a QEMU user, I expected there to be a way to specify a dtb from a file that could be used as the actual device tree inside the virtual machine. Perhaps there is a way to do this, but I am not very familiar with the QEMU code and do not know how it should work.
>
>> only possible way is to add an MMIO device to the dtb,
>> which can be implemented by manually adding new functions
>> to the QEMU code, as was done in the VMApple implementation.
>>
>> Signed-off-by: Alexander Gryanko <xpahos@gmail.com>
>> ---
>> hw/arm/virt.c | 25 +++++++++++++++++++++++++
>> include/hw/arm/virt.h | 1 +
>> 2 files changed, 26 insertions(+)
>>
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 02209fadcf..1059584b67 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -39,6 +39,7 @@
>> #include "hw/arm/virt.h"
>> #include "hw/block/flash.h"
>> #include "hw/display/ramfb.h"
>> +#include "hw/misc/pvpanic.h"
>> #include "net/net.h"
>> #include "system/device_tree.h"
>> #include "system/numa.h"
>> @@ -182,6 +183,7 @@ static const MemMapEntry base_memmap[] = {
>> [VIRT_UART0] = { 0x09000000, 0x00001000 },
>> [VIRT_RTC] = { 0x09010000, 0x00001000 },
>> [VIRT_FW_CFG] = { 0x09020000, 0x00000018 },
>> + [VIRT_PVPANIC] = { 0x09021000, 0x00000002 },
>> [VIRT_GPIO] = { 0x09030000, 0x00001000 },
>> [VIRT_UART1] = { 0x09040000, 0x00001000 },
>> [VIRT_SMMU] = { 0x09050000, SMMU_IO_LEN },
>> @@ -276,6 +278,27 @@ static bool ns_el2_virt_timer_present(void)
>> arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, cpu);
>> }
>>
>> +static void create_pvpanic(VirtMachineState *vms)
>> +{
>> + char *nodename;
>> + MachineState *ms = MACHINE(vms);
>> + DeviceState *dev = qdev_new(TYPE_PVPANIC_MMIO_DEVICE);
>> + SysBusDevice *s = SYS_BUS_DEVICE(dev);
>> +
>> + hwaddr base = vms->memmap[VIRT_PVPANIC].base;
>> + hwaddr size = vms->memmap[VIRT_PVPANIC].size;
>> +
>> + sysbus_realize_and_unref(s, &error_fatal);
>> + sysbus_mmio_map(s, 0, base);
>> +
>> + nodename = g_strdup_printf("/pvpanic@%" PRIx64, base);
>> + qemu_fdt_add_subnode(ms->fdt, nodename);
>> + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
>> + "qemu,pvpanic-mmio");
>> + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
>> + 2, base, 2, size);
>> +}
>> +
>> static void create_fdt(VirtMachineState *vms)
>> {
>> MachineState *ms = MACHINE(vms);
>> @@ -2498,6 +2521,8 @@ static void machvirt_init(MachineState *machine)
>> create_pcie(vms);
>> create_cxl_host_reg_region(vms);
>>
>> + create_pvpanic(vms);
>
> given that virt is versioned machine type,
> we probably need a compat knob to disable it's creation on old machine types
>
>> +
>> if (has_ged && aarch64 && firmware_loaded && virt_is_acpi_enabled(vms)) {
>> vms->acpi_dev = create_acpi_ged(vms);
>> } else {
>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>> index ea2cff05b0..39bf07c9c1 100644
>> --- a/include/hw/arm/virt.h
>> +++ b/include/hw/arm/virt.h
>> @@ -81,6 +81,7 @@ enum {
>> VIRT_NVDIMM_ACPI,
>> VIRT_PVTIME,
>> VIRT_ACPI_PCIHP,
>> + VIRT_PVPANIC,
>> VIRT_LOWMEMMAP_LAST,
>> };
>>
>>
>> ---
>> base-commit: bd6aa0d1e59d71218c3eee055bc8d222c6e1a628
>> change-id: 20251004-arm-pvpanic-84a7d7b67d8d
>>
>> Best regards,
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] hw/arm: add pvpanic mmio device for arm
2025-10-09 13:25 ` Alexander Gryanko
@ 2025-10-09 13:29 ` Peter Maydell
2025-10-09 16:30 ` Alexander Gryanko
0 siblings, 1 reply; 15+ messages in thread
From: Peter Maydell @ 2025-10-09 13:29 UTC (permalink / raw)
To: Alexander Gryanko; +Cc: Igor Mammedov, qemu-devel, qemu-arm, qemu-trivial
On Thu, 9 Oct 2025 at 14:26, Alexander Gryanko <xpahos@gmail.com> wrote:
>
>
>
> > On 7 Oct 2025, at 16:11, Igor Mammedov <imammedo@redhat.com> wrote:
> >
> > On Sat, 4 Oct 2025 23:19:09 +0300
> > Alexander Gryanko <xpahos@gmail.com> wrote:
> >
> >> Currently, pvpanic is available in three device types: ISA,
> >> MMIO, and PCI. For early stages of system initialisation
> >> before PCI enumeration, only ISA and MMIO are suitable.
> >> ISA is specific to the x86 platform; only MMIO devices
> >> can be used for ARM. It is not possible to specify a
> >> device as on the x86 platform (-device pvpanic); the
> >
> > perhaps ARM folsk know better, don't we have some
> > user create-able sysbus devices? Can it be implemented
> > as such, so we would avoid creating built-in device?
>
> As a QEMU user, I expected there to be a way to specify a dtb from a file that could be used as the actual device tree inside the virtual machine. Perhaps there is a way to do this, but I am not very familiar with the QEMU code and do not know how it should work.
You can generally use '-machine dtb=file.dtb'. But note that
this entirely overrides any internally generated dtb file
for machines that do that, so for those machine types it's
mostly a helpful debugging tool.
-- PMM
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] hw/arm: add pvpanic mmio device for arm
2025-10-09 13:29 ` Peter Maydell
@ 2025-10-09 16:30 ` Alexander Gryanko
2025-10-09 16:36 ` Peter Maydell
0 siblings, 1 reply; 15+ messages in thread
From: Alexander Gryanko @ 2025-10-09 16:30 UTC (permalink / raw)
To: Peter Maydell; +Cc: Igor Mammedov, qemu-devel, qemu-arm, qemu-trivial
[-- Attachment #1: Type: text/plain, Size: 2570 bytes --]
> On 9 Oct 2025, at 16:29, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Thu, 9 Oct 2025 at 14:26, Alexander Gryanko <xpahos@gmail.com <mailto:xpahos@gmail.com>> wrote:
>>
>>
>>
>>> On 7 Oct 2025, at 16:11, Igor Mammedov <imammedo@redhat.com> wrote:
>>>
>>> On Sat, 4 Oct 2025 23:19:09 +0300
>>> Alexander Gryanko <xpahos@gmail.com> wrote:
>>>
>>>> Currently, pvpanic is available in three device types: ISA,
>>>> MMIO, and PCI. For early stages of system initialisation
>>>> before PCI enumeration, only ISA and MMIO are suitable.
>>>> ISA is specific to the x86 platform; only MMIO devices
>>>> can be used for ARM. It is not possible to specify a
>>>> device as on the x86 platform (-device pvpanic); the
>>>
>>> perhaps ARM folsk know better, don't we have some
>>> user create-able sysbus devices? Can it be implemented
>>> as such, so we would avoid creating built-in device?
>>
>> As a QEMU user, I expected there to be a way to specify a dtb from a file that could be used as the actual device tree inside the virtual machine. Perhaps there is a way to do this, but I am not very familiar with the QEMU code and do not know how it should work.
>
> You can generally use '-machine dtb=file.dtb'. But note that
> this entirely overrides any internally generated dtb file
> for machines that do that, so for those machine types it's
> mostly a helpful debugging tool.
I added '-machine dumpdtb=qemu.dtb', then converted dtb to dts 'dtc -I dtb -O dts -o qemu.dts qemu.dtb', added
pvpanic@9060000 {
reg = <0x0 0x09060000 0x0 0x2>;
compatible = "qemu,pvpanic-mmio";
};
Then I compiled qemu without optimisation and set a breakpoint in ‘pvpanic_mmio_initfn'. It was never called with '-machine dtb=file.dtb'. 'info qtree' also does not show the device. Perhaps I have configured something incorrectly?
/opt/qemu10/bin/qemu-system-aarch64 \
-S -d guest_errors,unimp -trace enable=device_* -D $CWD/qemu.log \
-trace memory_region_ops_write \
-cpu cortex-a72 \
-m 2048 \
-bios $CWD/QEMU_EFI.fd \
-nographic \
-qmp unix:$CWD/qmp.sock,server,nowait \
-drive if=virtio,format=raw,file=$CWD/market.img \
-chardev socket,id=ch0,path=$CWD/serial0.sock,reconnect=1,logfile=$CWD/serial0.log \
-serial chardev:ch0 \
-blockdev driver=file,filename="$CWD/OVMF_VARS.fd",node-name=uefi-vars,read-only=on \
-vnc :0 \
-display none \
-audiodev none,id=none \
-machine virt,dtb=uefi.dtb \
-monitor stdio \
>
> -- PMM
[-- Attachment #2: Type: text/html, Size: 9021 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] hw/arm: add pvpanic mmio device for arm
2025-10-09 16:30 ` Alexander Gryanko
@ 2025-10-09 16:36 ` Peter Maydell
0 siblings, 0 replies; 15+ messages in thread
From: Peter Maydell @ 2025-10-09 16:36 UTC (permalink / raw)
To: Alexander Gryanko; +Cc: Igor Mammedov, qemu-devel, qemu-arm, qemu-trivial
On Thu, 9 Oct 2025 at 17:30, Alexander Gryanko <xpahos@gmail.com> wrote:
> I added '-machine dumpdtb=qemu.dtb', then converted dtb to dts 'dtc -I dtb -O dts -o qemu.dts qemu.dtb', added
>
> pvpanic@9060000 {
> reg = <0x0 0x09060000 0x0 0x2>;
> compatible = "qemu,pvpanic-mmio";
> };
>
> Then I compiled qemu without optimisation and set a breakpoint in ‘pvpanic_mmio_initfn'. It was never called with '-machine dtb=file.dtb'. 'info qtree' also does not show the device. Perhaps I have configured something incorrectly?
QEMU's virt board does not read the DTB and create
devices accordingly. It creates devices and writes
a DTB that matches what it has done. Editing the
DTB but not QEMU won't cause the device to be created,
it will just tell the guest kernel that there's a device
which doesn't really exist.
thanks
-- PMM
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2025-10-09 16:37 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
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2025-10-04 20:19 [PATCH] hw/arm: add pvpanic mmio device for arm Alexander Gryanko
2025-10-05 20:16 ` [PATCH v2] " xpahos
2025-10-05 22:50 ` xpahos
2025-10-06 10:41 ` [PATCH] " Peter Maydell
2025-10-06 11:52 ` Alexander Gryanko
2025-10-06 12:03 ` Peter Maydell
2025-10-07 13:11 ` Igor Mammedov
2025-10-09 13:25 ` Alexander Gryanko
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2025-10-04 17:47 [PATCH] system/runstate.c: Add a newline character to correctly log guest errors Alexander Gryanko
2025-10-05 18:58 ` [PATCH v2] " Alexander Gryanko
2025-10-05 22:21 ` xpahos
2025-10-05 22:27 ` [PATCH v2] hw/arm: add pvpanic mmio device for arm xpahos
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