Re: [PATCH] target/ppc: Use SMT4 small core chip type in POWER9/10 PVRs

["Nicholas Piggin" <npiggin@gmail.com>]

On Tue May 16, 2023 at 6:43 PM AEST, Harsh Prateek Bora wrote:
> <correcting my email id in CC>
>
> On 5/15/23 21:31, Nicholas Piggin wrote:
> > QEMU's PVR value for POWER9 DD2.0 has chip type 1, which is the SMT4
> > "small core" type that OpenPOWER processors use. QEMU's PVR for all
> > other POWER9/10 have chip type 0, which "enterprise" systems use.
> > 
> > The difference does not really matter to QEMU (because it does not care
> > about SMT mode in the target), but for consistency all PVRs should use
> > the same chip type. We'll go with the SMT4 OpenPOWER type.
> > 
> > Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> > ---
> > This is a replacement for
> > 
> > https://lists.gnu.org/archive/html/qemu-ppc/2022-03/msg00227.html
> > 
> > But the chip type is changed to 1 instead of 0, because that's the
> > more familiar SM4 / small core CPU.
> > 
> > Thanks,
> > Nick
> > 
> >   target/ppc/cpu-models.h | 6 +++---
> >   1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h
> > index 1326493a9a..a77e036b3a 100644
> > --- a/target/ppc/cpu-models.h
> > +++ b/target/ppc/cpu-models.h
> > @@ -348,11 +348,11 @@ enum {
> >       CPU_POWERPC_POWER8NVL_BASE     = 0x004C0000,
> >       CPU_POWERPC_POWER8NVL_v10      = 0x004C0100,
> >       CPU_POWERPC_POWER9_BASE        = 0x004E0000,
> > -    CPU_POWERPC_POWER9_DD1         = 0x004E0100,
> > +    CPU_POWERPC_POWER9_DD1         = 0x004E1100,
>
> Could you please point me to the doc location you are referring here?
> The P9 UM document that I have access to mentions this bit (0/1) for 
> 12/24 cores. Not sure if this change is intended here.

Yes that's the one, OpenPOWER POWER9 User Manual lists it in PVR.
POWER10 is the same.

Thanks,
Nick