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[203.219.189.129]) by smtp.gmail.com with ESMTPSA id f3-20020aa78b03000000b0064385a057dfsm13114806pfd.181.2023.05.16.02.44.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 May 2023 02:44:17 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 16 May 2023 19:44:13 +1000 Message-Id: Cc: , "Harsh Prateek Bora" Subject: Re: [PATCH v4] target/ppc: Add POWER9 DD2.2 model From: "Nicholas Piggin" To: "Frederic Barrat" , X-Mailer: aerc 0.14.0 References: <20230515160201.394587-1-npiggin@gmail.com> In-Reply-To: Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=npiggin@gmail.com; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue May 16, 2023 at 5:56 PM AEST, Frederic Barrat wrote: > > > On 15/05/2023 18:02, Nicholas Piggin wrote: > > POWER9 DD2.1 and earlier had significant limitations when running KVM, > > including lack of "mixed mode" MMU support (ability to run HPT and RPT > > mode on threads of the same core), and a translation prefetch issue > > which is worked around by disabling "AIL" mode for the guest. > >=20 > > These processors are not widely available, and it's difficult to deal > > with all these quirks in qemu +/- KVM, so create a POWER9 DD2.2 CPU > > and make it the default POWER9 CPU. > >=20 > > Signed-off-by: Nicholas Piggin > > --- > > Reviewed-by: Frederic Barrat > > Which makes me wonder if the P9 DD1 and P10 DD1 cpu definitions are=20 > worth keeping, since we don't really try emulating the differences and=20 > we don't support them in firmware/skiboot. The only place where we seem= =20 > to bother is in target/ppc/kvm.c and that's precisely what this patch is= =20 > trying to avoid. +1. We could do a follow up as Cedric suggested. Thanks, Nick