Re: [PATCH v6 2/3] hw/ppc: Add N1 chiplet model

["Nicholas Piggin" <npiggin@gmail.com>]

On Tue Nov 28, 2023 at 3:13 AM AEST, Chalapathi V wrote:
> The N1 chiplet handle the high speed i/o traffic over PCIe and others.
> The N1 chiplet consists of PowerBus Fabric controller,
> nest Memory Management Unit, chiplet control unit and more.
>
> This commit creates a N1 chiplet model and initialize and realize the
> pervasive chiplet model where chiplet control registers are implemented.
>
> This commit also implement the read/write method for the powerbus scom
> registers
>
> Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com>
> ---
>  include/hw/ppc/pnv_n1_chiplet.h |  35 +++++++
>  include/hw/ppc/pnv_xscom.h      |   6 ++
>  hw/ppc/pnv_n1_chiplet.c         | 171 ++++++++++++++++++++++++++++++++
>  hw/ppc/meson.build              |   1 +
>  4 files changed, 213 insertions(+)
>  create mode 100644 include/hw/ppc/pnv_n1_chiplet.h
>  create mode 100644 hw/ppc/pnv_n1_chiplet.c
>
> diff --git a/include/hw/ppc/pnv_n1_chiplet.h b/include/hw/ppc/pnv_n1_chiplet.h
> new file mode 100644
> index 0000000000..3c42ada7f4
> --- /dev/null
> +++ b/include/hw/ppc/pnv_n1_chiplet.h
> @@ -0,0 +1,35 @@
> +/*
> + * QEMU PowerPC N1 chiplet model
> + *
> + * Copyright (c) 2023, IBM Corporation.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + *
> + * This code is licensed under the GPL version 2 or later. See the
> + * COPYING file in the top-level directory.

Same question about tag here in in the .c. Otherwise,

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>

Thanks,
Nick