From: Bernhard Beschow <shentey@gmail.com>
To: BALATON Zoltan <balaton@eik.bme.hu>
Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"John Snow" <jsnow@redhat.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
qemu-ppc@nongnu.org
Subject: Re: [PATCH 13/13] hw/ide: Extract bmdma_clear_status()
Date: Sun, 23 Apr 2023 07:48:58 +0000 [thread overview]
Message-ID: <D1082CEC-16C3-4A31-88DB-3F48BEAFB928@gmail.com> (raw)
In-Reply-To: <d603fd42-6aba-99be-c24d-d04fc36abacb@eik.bme.hu>
Am 22. April 2023 21:26:00 UTC schrieb BALATON Zoltan <balaton@eik.bme.hu>:
>On Sat, 22 Apr 2023, Bernhard Beschow wrote:
>> Extract bmdma_clear_status() mirroring bmdma_cmd_writeb().
>
>Is adding a trace point useful? This is called from places that already have traces so I don't think we need another separate trace point here.
Adding a trace point was my original motivation to have this function. Then I realized that extracting the code in a dedicated function is a merit in itself. The trace point is a leftover, so I'll remove it.
>Also the names don't match but maybe rename function to bmdma_update_status instead as it is more what it does.
The status attribute models a w1c-style register. Writing to it can only clear bits, hence the name. Indeed I originally named the function bmdma_update_status() but thought it was too vague. I'm open to suggestions though.
Best regards,
Bernhard
>
>Regards,
>BALATON Zoltan
>
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>> ---
>> include/hw/ide/pci.h | 1 +
>> hw/ide/cmd646.c | 2 +-
>> hw/ide/pci.c | 7 +++++++
>> hw/ide/piix.c | 2 +-
>> hw/ide/sii3112.c | 12 +++++-------
>> hw/ide/via.c | 2 +-
>> hw/ide/trace-events | 1 +
>> 7 files changed, 17 insertions(+), 10 deletions(-)
>>
>> diff --git a/include/hw/ide/pci.h b/include/hw/ide/pci.h
>> index 81e0370202..6a286ad307 100644
>> --- a/include/hw/ide/pci.h
>> +++ b/include/hw/ide/pci.h
>> @@ -59,6 +59,7 @@ struct PCIIDEState {
>> void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d);
>> void bmdma_init_ops(PCIIDEState *d, const MemoryRegionOps *bmdma_ops);
>> void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val);
>> +void bmdma_clear_status(BMDMAState *bm, uint32_t val);
>> void pci_ide_create_devs(PCIDevice *dev);
>>
>> #endif
>> diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
>> index b9d005a357..973c3ff0dc 100644
>> --- a/hw/ide/cmd646.c
>> +++ b/hw/ide/cmd646.c
>> @@ -144,7 +144,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
>> cmd646_update_irq(pci_dev);
>> break;
>> case 2:
>> - bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
>> + bmdma_clear_status(bm, val);
>> break;
>> case 3:
>> if (bm == &bm->pci_dev->bmdma[0]) {
>> diff --git a/hw/ide/pci.c b/hw/ide/pci.c
>> index 3539b162b7..4aa06be7c6 100644
>> --- a/hw/ide/pci.c
>> +++ b/hw/ide/pci.c
>> @@ -318,6 +318,13 @@ void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val)
>> bm->cmd = val & 0x09;
>> }
>>
>> +void bmdma_clear_status(BMDMAState *bm, uint32_t val)
>> +{
>> + trace_bmdma_update_status(val);
>> +
>> + bm->status = (val & 0x60) | (bm->status & BM_STATUS_DMAING) | (bm->status & ~val & 0x06);
>> +}
>> +
>> static uint64_t bmdma_addr_read(void *opaque, hwaddr addr,
>> unsigned width)
>> {
>> diff --git a/hw/ide/piix.c b/hw/ide/piix.c
>> index 406a67fa0f..9eab615e35 100644
>> --- a/hw/ide/piix.c
>> +++ b/hw/ide/piix.c
>> @@ -76,7 +76,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
>> bmdma_cmd_writeb(bm, val);
>> break;
>> case 2:
>> - bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
>> + bmdma_clear_status(bm, val);
>> break;
>> }
>> }
>> diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
>> index 373c0dd1ee..1180ff55e7 100644
>> --- a/hw/ide/sii3112.c
>> +++ b/hw/ide/sii3112.c
>> @@ -66,7 +66,7 @@ static void sii3112_bmdma_write(void *opaque, hwaddr addr,
>> uint64_t val, unsigned int size)
>> {
>> BMDMAState *bm = opaque;
>> - SiI3112PCIState *d = SII3112_PCI(bm->pci_dev);
>> + SiI3112PCIState *s = SII3112_PCI(bm->pci_dev);
>> int i = (bm == &bm->pci_dev->bmdma[0]) ? 0 : 1;
>>
>> trace_sii3112_bmdma_write(size, addr, val);
>> @@ -75,10 +75,10 @@ static void sii3112_bmdma_write(void *opaque, hwaddr addr,
>> bmdma_cmd_writeb(bm, val);
>> break;
>> case 0x01:
>> - d->regs[i].swdata = val & 0x3f;
>> + s->regs[i].swdata = val & 0x3f;
>> break;
>> case 0x02:
>> - bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 6);
>> + bmdma_clear_status(bm, val);
>> break;
>> default:
>> break;
>> @@ -160,8 +160,7 @@ static void sii3112_reg_write(void *opaque, hwaddr addr,
>> d->regs[0].swdata = val & 0x3f;
>> break;
>> case 0x12:
>> - d->i.bmdma[0].status = (val & 0x60) | (d->i.bmdma[0].status & 1) |
>> - (d->i.bmdma[0].status & ~val & 6);
>> + bmdma_clear_status(&d->i.bmdma[0], val);
>> break;
>> case 0x18:
>> bmdma_cmd_writeb(&d->i.bmdma[1], val);
>> @@ -170,8 +169,7 @@ static void sii3112_reg_write(void *opaque, hwaddr addr,
>> d->regs[1].swdata = val & 0x3f;
>> break;
>> case 0x1a:
>> - d->i.bmdma[1].status = (val & 0x60) | (d->i.bmdma[1].status & 1) |
>> - (d->i.bmdma[1].status & ~val & 6);
>> + bmdma_clear_status(&d->i.bmdma[1], val);
>> break;
>> case 0x100:
>> d->regs[0].scontrol = val & 0xfff;
>> diff --git a/hw/ide/via.c b/hw/ide/via.c
>> index 35dd97e49b..afb97f302a 100644
>> --- a/hw/ide/via.c
>> +++ b/hw/ide/via.c
>> @@ -75,7 +75,7 @@ static void bmdma_write(void *opaque, hwaddr addr,
>> bmdma_cmd_writeb(bm, val);
>> break;
>> case 2:
>> - bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
>> + bmdma_clear_status(bm, val);
>> break;
>> default:;
>> }
>> diff --git a/hw/ide/trace-events b/hw/ide/trace-events
>> index a479525e38..d219c64b61 100644
>> --- a/hw/ide/trace-events
>> +++ b/hw/ide/trace-events
>> @@ -30,6 +30,7 @@ bmdma_write_cmd646(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%
>> # pci.c
>> bmdma_reset(void) ""
>> bmdma_cmd_writeb(uint32_t val) "val: 0x%08x"
>> +bmdma_update_status(uint32_t val) "val: 0x%08x"
>> bmdma_addr_read(uint64_t data) "data: 0x%016"PRIx64
>> bmdma_addr_write(uint64_t data) "data: 0x%016"PRIx64
>>
>>
next prev parent reply other threads:[~2023-04-23 7:50 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-22 15:07 [PATCH 00/13] Clean up PCI IDE device models Bernhard Beschow
2023-04-22 15:07 ` [PATCH 01/13] hw/ide/pci: Expose legacy interrupts as GPIOs Bernhard Beschow
2023-04-26 10:41 ` Mark Cave-Ayland
2023-04-26 19:26 ` Bernhard Beschow
2023-04-22 15:07 ` [PATCH 02/13] hw/ide/via: Implement ISA IRQ routing Bernhard Beschow
2023-04-22 17:23 ` BALATON Zoltan
2023-04-22 18:47 ` Bernhard Beschow
2023-04-22 19:21 ` BALATON Zoltan
2023-04-24 7:50 ` Bernhard Beschow
2023-04-24 10:10 ` BALATON Zoltan
2023-04-26 10:55 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 03/13] hw/isa/vt82c686: Remove via_isa_set_irq() Bernhard Beschow
2023-04-26 10:55 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 04/13] hw/ide: Extract IDEBus assignment into bmdma_init() Bernhard Beschow
2023-04-22 17:31 ` BALATON Zoltan
2023-04-23 17:36 ` Philippe Mathieu-Daudé
2023-04-26 10:56 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 05/13] hw/ide: Extract pci_ide_class_init() Bernhard Beschow
2023-04-22 17:34 ` BALATON Zoltan
2023-04-22 18:59 ` Bernhard Beschow
2023-04-23 17:41 ` Philippe Mathieu-Daudé
2023-04-23 22:11 ` Bernhard Beschow
2023-04-23 22:23 ` BALATON Zoltan
2023-04-26 11:04 ` Mark Cave-Ayland
2023-04-26 18:32 ` Bernhard Beschow
2023-04-22 15:07 ` [PATCH 06/13] hw/ide: Extract bmdma_init_ops() Bernhard Beschow
2023-04-23 17:43 ` Philippe Mathieu-Daudé
2023-04-23 22:06 ` Bernhard Beschow
2023-04-26 11:14 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 07/13] hw/ide: Extract pci_ide_{cmd, data}_le_ops initialization into base class constructor Bernhard Beschow
2023-04-23 17:46 ` [PATCH 07/13] hw/ide: Extract pci_ide_{cmd,data}_le_ops " Philippe Mathieu-Daudé
2023-04-24 7:45 ` Bernhard Beschow
2023-04-26 11:16 ` [PATCH 07/13] hw/ide: Extract pci_ide_{cmd, data}_le_ops " Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 08/13] hw/ide: Rename PCIIDEState::*_bar attributes Bernhard Beschow
2023-04-22 17:53 ` BALATON Zoltan
2023-04-26 11:21 ` Mark Cave-Ayland
2023-04-26 18:29 ` Bernhard Beschow
2023-04-27 11:07 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 09/13] hw/ide/piix: Disuse isa_get_irq() Bernhard Beschow
2023-04-26 11:33 ` Mark Cave-Ayland
2023-04-26 18:25 ` Bernhard Beschow
2023-04-27 12:31 ` Mark Cave-Ayland
2023-05-13 11:53 ` Bernhard Beschow
2023-05-14 12:43 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 10/13] hw/ide/piix: Reuse PCIIDEState::{cmd,data}_ops Bernhard Beschow
2023-04-26 11:37 ` Mark Cave-Ayland
2023-04-26 18:18 ` Bernhard Beschow
2023-04-26 20:14 ` Bernhard Beschow
2023-04-27 10:52 ` Mark Cave-Ayland
2023-04-27 18:15 ` Bernhard Beschow
2023-04-28 15:58 ` Bernhard Beschow
2023-04-28 17:00 ` BALATON Zoltan
2023-05-03 19:52 ` Mark Cave-Ayland
2023-05-13 12:21 ` Bernhard Beschow
2023-05-18 14:53 ` Mark Cave-Ayland
2023-05-19 17:09 ` Bernhard Beschow
2023-04-22 15:07 ` [PATCH 11/13] hw/ide/sii3112: " Bernhard Beschow
2023-04-22 21:10 ` BALATON Zoltan
2023-04-23 22:19 ` Bernhard Beschow
2023-04-23 22:38 ` BALATON Zoltan
2023-04-26 11:41 ` Mark Cave-Ayland
2023-04-26 20:24 ` Bernhard Beschow
2023-04-26 23:24 ` BALATON Zoltan
2023-04-27 11:15 ` Mark Cave-Ayland
2023-04-27 12:55 ` BALATON Zoltan
2023-05-03 20:25 ` Mark Cave-Ayland
2023-04-22 15:07 ` [PATCH 12/13] hw/ide/sii3112: Reuse PCIIDEState::bmdma_ops Bernhard Beschow
2023-04-26 11:44 ` Mark Cave-Ayland
2023-04-26 20:26 ` Bernhard Beschow
2023-04-22 15:07 ` [PATCH 13/13] hw/ide: Extract bmdma_clear_status() Bernhard Beschow
2023-04-22 21:26 ` BALATON Zoltan
2023-04-23 7:48 ` Bernhard Beschow [this message]
2023-04-23 10:40 ` BALATON Zoltan
2023-04-23 21:53 ` Bernhard Beschow
2023-04-22 22:46 ` BALATON Zoltan
2023-04-23 7:35 ` Bernhard Beschow
2023-04-26 11:48 ` Mark Cave-Ayland
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