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[220.245.239.57]) by smtp.gmail.com with ESMTPSA id f5-20020a170902ce8500b001e98f928d0fsm9705975plg.10.2024.05.07.03.05.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 May 2024 03:05:18 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Tue, 07 May 2024 20:05:14 +1000 Message-Id: Cc: "Daniel Henrique Barboza" Subject: Re: [PATCH v2 17/28] target/ppc/mmu_common.c: Fix misindented qemu_log_mask() calls From: "Nicholas Piggin" To: "BALATON Zoltan" , , X-Mailer: aerc 0.17.0 References: In-Reply-To: Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=npiggin@gmail.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu May 2, 2024 at 9:43 AM AEST, BALATON Zoltan wrote: > Fix several qemu_log_mask() calls that are misindented. Acked-by: Nicholas Piggin > > Signed-off-by: BALATON Zoltan > --- > target/ppc/mmu_common.c | 42 ++++++++++++++++++++--------------------- > 1 file changed, 20 insertions(+), 22 deletions(-) > > diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c > index ebf18a751c..28847c32f2 100644 > --- a/target/ppc/mmu_common.c > +++ b/target/ppc/mmu_common.c > @@ -297,8 +297,8 @@ static int ppc6xx_tlb_get_bat(CPUPPCState *env, mmu_c= tx_t *ctx, > int ret =3D -1; > bool ifetch =3D access_type =3D=3D MMU_INST_FETCH; > =20 > - qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT v " TARGET_FMT_lx "\n", __fun= c__, > - ifetch ? 'I' : 'D', virtual); > + qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT v " TARGET_FMT_lx "\n", __func= __, > + ifetch ? 'I' : 'D', virtual); > if (ifetch) { > BATlt =3D env->IBAT[1]; > BATut =3D env->IBAT[0]; > @@ -312,9 +312,9 @@ static int ppc6xx_tlb_get_bat(CPUPPCState *env, mmu_c= tx_t *ctx, > BEPIu =3D *BATu & 0xF0000000; > BEPIl =3D *BATu & 0x0FFE0000; > bat_size_prot(env, &bl, &valid, &prot, BATu, BATl); > - qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT%d v " TARGET_FMT_lx " BAT= u " > - TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n", __func= __, > - ifetch ? 'I' : 'D', i, virtual, *BATu, *BATl); > + qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT%d v " TARGET_FMT_lx " BATu= " > + TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n", __func_= _, > + ifetch ? 'I' : 'D', i, virtual, *BATu, *BATl); > if ((virtual & 0xF0000000) =3D=3D BEPIu && > ((virtual & 0x0FFE0000) & ~bl) =3D=3D BEPIl) { > /* BAT matches */ > @@ -346,12 +346,11 @@ static int ppc6xx_tlb_get_bat(CPUPPCState *env, mmu= _ctx_t *ctx, > BEPIu =3D *BATu & 0xF0000000; > BEPIl =3D *BATu & 0x0FFE0000; > bl =3D (*BATu & 0x00001FFC) << 15; > - qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT%d v " > - TARGET_FMT_lx " BATu " TARGET_FMT_lx > - " BATl " TARGET_FMT_lx "\n\t" TARGET_FMT_= lx " " > - TARGET_FMT_lx " " TARGET_FMT_lx "\n", > - __func__, ifetch ? 'I' : 'D', i, virtual, > - *BATu, *BATl, BEPIu, BEPIl, bl); > + qemu_log_mask(CPU_LOG_MMU, "%s: %cBAT%d v " TARGET_FMT_l= x > + " BATu " TARGET_FMT_lx " BATl " TARGET_FMT= _lx > + "\n\t" TARGET_FMT_lx " " TARGET_FMT_lx " " > + TARGET_FMT_lx "\n", __func__, ifetch ? 'I'= : 'D', > + i, virtual, *BATu, *BATl, BEPIu, BEPIl, bl= ); > } > } > } > @@ -400,9 +399,8 @@ static int mmu6xx_get_physical_address(CPUPPCState *e= nv, mmu_ctx_t *ctx, > hash =3D vsid ^ pgidx; > ctx->ptem =3D (vsid << 7) | (pgidx >> 10); > =20 > - qemu_log_mask(CPU_LOG_MMU, > - "pte segment: key=3D%d ds %d nx %d vsid " TARGET_FMT_lx "\n"= , > - ctx->key, ds, ctx->nx, vsid); > + qemu_log_mask(CPU_LOG_MMU, "pte segment: key=3D%d ds %d nx %d vsid " > + TARGET_FMT_lx "\n", ctx->key, ds, ctx->nx, vsid); > ret =3D -1; > if (!ds) { > /* Check if instruction fetch is allowed, if needed */ > @@ -599,9 +597,9 @@ static int mmu40x_get_physical_address(CPUPPCState *e= nv, mmu_ctx_t *ctx, > return 0; > } > } > - qemu_log_mask(CPU_LOG_MMU, "%s: access refused " TARGET_FMT_lx > - " =3D> " HWADDR_FMT_plx > - " %d %d\n", __func__, address, raddr, ctx->prot, ret)= ; > + qemu_log_mask(CPU_LOG_MMU, "%s: access refused " TARGET_FMT_lx > + " =3D> " HWADDR_FMT_plx " %d %d\n", > + __func__, address, raddr, ctx->prot, ret); > =20 > return ret; > } > @@ -713,11 +711,11 @@ int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t= *tlb, hwaddr *raddrp, > } > =20 > mask =3D ~(booke206_tlb_to_page_size(env, tlb) - 1); > - qemu_log_mask(CPU_LOG_MMU, "%s: TLB ADDR=3D0x" TARGET_FMT_lx > - " PID=3D0x%x MAS1=3D0x%x MAS2=3D0x%" PRIx64 " mask=3D= 0x%" > - HWADDR_PRIx " MAS7_3=3D0x%" PRIx64 " MAS8=3D0x%" PRIx= 32 "\n", > - __func__, address, pid, tlb->mas1, tlb->mas2, mask, > - tlb->mas7_3, tlb->mas8); > + qemu_log_mask(CPU_LOG_MMU, "%s: TLB ADDR=3D0x" TARGET_FMT_lx > + " PID=3D0x%x MAS1=3D0x%x MAS2=3D0x%" PRIx64 " mask=3D0= x%" > + HWADDR_PRIx " MAS7_3=3D0x%" PRIx64 " MAS8=3D0x%" PRIx3= 2 "\n", > + __func__, address, pid, tlb->mas1, tlb->mas2, mask, > + tlb->mas7_3, tlb->mas8); > =20 > /* Check PID */ > tlb_pid =3D (tlb->mas1 & MAS1_TID_MASK) >> MAS1_TID_SHIFT;