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Wed, 08 May 2024 06:17:57 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 08 May 2024 23:17:52 +1000 Message-Id: Cc: "Daniel Henrique Barboza" Subject: Re: [PATCH v3 26/33] target/ppc/mmu_common.c: Simplify ppc_booke_xlate() part 1 From: "Nicholas Piggin" To: "BALATON Zoltan" , , X-Mailer: aerc 0.17.0 References: <5074c129ebfea0e1dfc22ef4691d8b62038d59b2.1715125376.git.balaton@eik.bme.hu> In-Reply-To: <5074c129ebfea0e1dfc22ef4691d8b62038d59b2.1715125376.git.balaton@eik.bme.hu> Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=npiggin@gmail.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed May 8, 2024 at 10:15 AM AEST, BALATON Zoltan wrote: > Move setting error_code that appears in every case out in front and > hoist the common fall through case for BOOKE206 as well which allows > removing the nested switches. > =20 Reviewed-by: Nicholas Piggin > Signed-off-by: BALATON Zoltan > --- > target/ppc/mmu_common.c | 41 ++++++++++++----------------------------- > 1 file changed, 12 insertions(+), 29 deletions(-) > > diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c > index 788e2bebd5..c725a7932f 100644 > --- a/target/ppc/mmu_common.c > +++ b/target/ppc/mmu_common.c > @@ -1205,58 +1205,41 @@ static bool ppc_booke_xlate(PowerPCCPU *cpu, vadd= r eaddr, > } > =20 > log_cpu_state_mask(CPU_LOG_MMU, cs, 0); > + env->error_code =3D 0; > + if (ret =3D=3D -1) { > + if (env->mmu_model =3D=3D POWERPC_MMU_BOOKE206) { > + booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_id= x); > + } > + } > if (access_type =3D=3D MMU_INST_FETCH) { > switch (ret) { > case -1: > /* No matches in page tables or TLB */ > - switch (env->mmu_model) { > - case POWERPC_MMU_BOOKE206: > - booke206_update_mas_tlb_miss(env, eaddr, access_type, mm= u_idx); > - /* fall through */ > - case POWERPC_MMU_BOOKE: > - cs->exception_index =3D POWERPC_EXCP_ITLB; > - env->error_code =3D 0; > - env->spr[SPR_BOOKE_DEAR] =3D eaddr; > - env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, acc= ess_type); > - break; > - default: > - g_assert_not_reached(); > - } > + cs->exception_index =3D POWERPC_EXCP_ITLB; > + env->spr[SPR_BOOKE_DEAR] =3D eaddr; > + env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, access_= type); > break; > case -2: > /* Access rights violation */ > cs->exception_index =3D POWERPC_EXCP_ISI; > - env->error_code =3D 0; > break; > case -3: > /* No execute protection violation */ > cs->exception_index =3D POWERPC_EXCP_ISI; > env->spr[SPR_BOOKE_ESR] =3D 0; I don't know BookE well but AFAIKS it says ESR if not set explicitly is generally cleared to 0 by interrupts which I guess is the case here. I don't see why the same would not apply to the -2 case either. That would reduce special cases. Although that's a behaviour change. It's possible current beahviour is deliberate or matches some particular CPU. Not something for this series. Thanks, Nick > - env->error_code =3D 0; > break; > } > } else { > switch (ret) { > case -1: > /* No matches in page tables or TLB */ > - switch (env->mmu_model) { > - case POWERPC_MMU_BOOKE206: > - booke206_update_mas_tlb_miss(env, eaddr, access_type, mm= u_idx); > - /* fall through */ > - case POWERPC_MMU_BOOKE: > - cs->exception_index =3D POWERPC_EXCP_DTLB; > - env->error_code =3D 0; > - env->spr[SPR_BOOKE_DEAR] =3D eaddr; > - env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, acc= ess_type); > - break; > - default: > - g_assert_not_reached(); > - } > + cs->exception_index =3D POWERPC_EXCP_DTLB; > + env->spr[SPR_BOOKE_DEAR] =3D eaddr; > + env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, access_= type); > break; > case -2: > /* Access rights violation */ > cs->exception_index =3D POWERPC_EXCP_DSI; > - env->error_code =3D 0; > env->spr[SPR_BOOKE_DEAR] =3D eaddr; > env->spr[SPR_BOOKE_ESR] =3D mmubooke206_esr(mmu_idx, access_= type); > break;