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[118.211.5.80]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70b0b8d2da1sm425997b3a.133.2024.07.04.17.12.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Jul 2024 17:12:36 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 05 Jul 2024 10:12:32 +1000 Message-Id: Cc: , , "Daniel Henrique Barboza" Subject: Re: [PATCH 11/43] target/ppc/mmu_common.c: Remove pte_update_flags() From: "Nicholas Piggin" To: "BALATON Zoltan" X-Mailer: aerc 0.17.0 References: <87df776b2534cc0ad2523d17c99453edb5de3459.1716763435.git.balaton@eik.bme.hu> <8f2565ea-b02d-c1c9-0466-e4994a01b0b9@eik.bme.hu> In-Reply-To: <8f2565ea-b02d-c1c9-0466-e4994a01b0b9@eik.bme.hu> Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=npiggin@gmail.com; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu Jul 4, 2024 at 10:34 PM AEST, BALATON Zoltan wrote: > On Thu, 4 Jul 2024, Nicholas Piggin wrote: > > On Mon May 27, 2024 at 9:12 AM AEST, BALATON Zoltan wrote: > >> This function is used only once, its return value is ignored and one > >> of its parameter is a return value from a previous call. It is better > >> to inline it in the caller and remove it. > >> > >> Signed-off-by: BALATON Zoltan > >> --- > >> target/ppc/mmu_common.c | 41 +++++++++++++---------------------------= - > >> 1 file changed, 13 insertions(+), 28 deletions(-) > >> > >> diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c > >> index e3537c63c0..c4902b7632 100644 > >> --- a/target/ppc/mmu_common.c > >> +++ b/target/ppc/mmu_common.c > >> @@ -119,39 +119,14 @@ static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, = target_ulong pte0, > >> } > >> } > >> > >> -static int pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p, > >> - int ret, MMUAccessType access_type) > >> -{ > >> - int store =3D 0; > >> - > >> - /* Update page flags */ > >> - if (!(*pte1p & 0x00000100)) { > >> - /* Update accessed flag */ > >> - *pte1p |=3D 0x00000100; > >> - store =3D 1; > >> - } > >> - if (!(*pte1p & 0x00000080)) { > >> - if (access_type =3D=3D MMU_DATA_STORE && ret =3D=3D 0) { > >> - /* Update changed flag */ > >> - *pte1p |=3D 0x00000080; > >> - store =3D 1; > >> - } else { > >> - /* Force page fault for first write access */ > >> - ctx->prot &=3D ~PAGE_WRITE; > >> - } > >> - } > >> - > >> - return store; > >> -} > >> - > >> /* Software driven TLB helpers */ > >> > >> static int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, > >> target_ulong eaddr, MMUAccessType access_= type) > >> { > >> ppc6xx_tlb_t *tlb; > >> - int nr, best, way; > >> - int ret; > >> + target_ulong *pte1p; > >> + int nr, best, way, ret; > >> > >> best =3D -1; > >> ret =3D -1; /* No TLB found */ > >> @@ -204,7 +179,17 @@ done: > >> " prot=3D%01x ret=3D%d\n", > >> ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret); > >> /* Update page flags */ > >> - pte_update_flags(ctx, &env->tlb.tlb6[best].pte1, ret, access_= type); > >> + pte1p =3D &env->tlb.tlb6[best].pte1; > >> + *pte1p |=3D 0x00000100; /* Update accessed flag */ > >> + if (!(*pte1p & 0x00000080)) { > >> + if (access_type =3D=3D MMU_DATA_STORE && ret =3D=3D 0) { > >> + /* Update changed flag */ > >> + *pte1p |=3D 0x00000080; > >> + } else { > >> + /* Force page fault for first write access */ > >> + ctx->prot &=3D ~PAGE_WRITE; > > > > Out of curiosity, I guess this unusual part is because ctx->prot can ge= t > > PAGE_WRITE set in the bat lookup, then it has to be cleared if the PTE > > does not have changed bit? > > I have no idea. I was just trying to clean up this code to make it simple= r=20 Yeah that's fine I wouldn't expect it to change here, just wondering if you'd dug into it more. I *think* that is the reaon for it. Thanks, Nick > with this series. I think historically there was a single function that= =20 > handled all models but as these became too different it was split up by= =20 > MMU models. It could be some of this are remnants of some old code where= =20 > some other model needed it and not needed any more or this could be merge= d=20 > with hash32 but I did not try to find that out, just try to make sure not= =20 > to break it any more than it might already be broken. > > Regards, > BALATON Zoltan > > >> + } > >> + } > >> } > > > > Reviewed-by: Nicholas Piggin > > > >> #if defined(DUMP_PAGE_TABLES) > >> if (qemu_loglevel_mask(CPU_LOG_MMU)) { > > > >