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Fri, 19 Jul 2024 00:17:53 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 19 Jul 2024 17:17:47 +1000 Message-Id: Cc: , , Subject: Re: [PATCH v3 0/9] XIVE changes for Cache Watch, VSTs, STT and info pic From: "Nicholas Piggin" To: "Mike Kowal" , =?utf-8?q?C=C3=A9dric_Le_Goater?= , "Michael Kowal" , X-Mailer: aerc 0.18.0 References: <20240716195633.12679-1-kowal@linux.vnet.ibm.com> <4b72c7b9-a812-43c6-b735-43eac8709fc6@kaod.org> <4d5b20b4-7c78-40d4-9844-fa013e0eb8ec@linux.ibm.com> In-Reply-To: <4d5b20b4-7c78-40d4-9844-fa013e0eb8ec@linux.ibm.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=npiggin@gmail.com; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri Jul 19, 2024 at 2:38 AM AEST, Mike Kowal wrote: > > On 7/16/2024 3:18 PM, C=C3=A9dric Le Goater wrote: > > Hello Mike, > > > > On 7/16/24 21:56, Michael Kowal wrote: > >> These changes provide enhanced support of the External Interrupt=20 > >> Virtualization > >> Engine.=C2=A0 The changes are focused on the following areas: > >> =C2=A0 - Cache Watch, Cache Flush and Sync Injection > >> =C2=A0 - Virtual Structure Tables > >> =C2=A0 - Set Translation Table > >> =C2=A0 - 'info pic' command data that is dumped > >> > >> Frederic Barrat (7): > >> =C2=A0=C2=A0 pnv/xive2: XIVE2 Cache Watch, Cache Flush and Sync Inject= ion support > >> =C2=A0=C2=A0 pnv/xive2: Add NVG and NVC to cache watch facility > >> =C2=A0=C2=A0 pnv/xive2: Configure Virtualization Structure Tables thro= ugh the PC > >> =C2=A0=C2=A0 pnv/xive2: Enable VST NVG and NVC index compression > >> =C2=A0=C2=A0 pnv/xive2: Set Translation Table for the NVC port space > >> =C2=A0=C2=A0 pnv/xive2: Fail VST entry address computation if table ha= s no VSD > >> =C2=A0=C2=A0 pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.c > >> > >> Michael Kowal (1): > >> =C2=A0=C2=A0 pnv/xive2: Structure/define alignment changes > >> > >> Nicholas Piggin (1): > >> =C2=A0=C2=A0 pnv/xive: Support cache flush and queue sync inject with= =20 > >> notifications > >> > >> =C2=A0 hw/intc/pnv_xive2_regs.h=C2=A0=C2=A0=C2=A0 | 108 +++++++ > >> =C2=A0 include/hw/ppc/pnv_chip.h=C2=A0=C2=A0 |=C2=A0=C2=A0 1 + > >> =C2=A0 include/hw/ppc/xive2_regs.h |=C2=A0=C2=A0 9 + > >> =C2=A0 hw/intc/pnv_xive2.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 | 566 ++++++++++++++++++++++++++++++------ > >> =C2=A0 hw/intc/xive.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 12 +- > >> =C2=A0 hw/intc/xive2.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 33 ++- > >> =C2=A0 6 files changed, 633 insertions(+), 96 deletions(-) > >> > >> --=20 > >> 2.43.0 > >> > > > > Hello Mike, > > > > When you respin a series, it is useful to update the individual > > patches with the given R-b tags. To keep track of them, you can use > > the b4 command : > > =C2=A0 =C2=A0 $ b4 am 20240715183332.27287-1-kowal@linux.vnet.ibm.com > > =C2=A0 Grabbing thread from=20 > > lore.kernel.org/all/20240715183332.27287-1-kowal@linux.vnet.ibm.com/t.m= box.gz > > =C2=A0 Analyzing 23 messages in the thread > > =C2=A0 Looking for additional code-review trailers on lore.kernel.org > > =C2=A0 Checking attestation on all messages, may take a moment... > > =C2=A0 --- > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 1/9] pnv/xive2: XIVE2 Cache Watc= h, Cache Flush and=20 > > Sync Injection support > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 2/9] pnv/xive2: Structure/define= alignment changes > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 + Reviewed-by: C=C3=A9dric Le Goater > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 3/9] pnv/xive: Support cache flu= sh and queue sync=20 > > inject with notifications > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 4/9] pnv/xive2: Add NVG and NVC = to cache watch facility > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 5/9] pnv/xive2: Configure Virtua= lization Structure=20 > > Tables through the PC > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 + Reviewed-by: C=C3=A9dric Le Goater > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 6/9] pnv/xive2: Enable VST NVG a= nd NVC index compression > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 + Reviewed-by: C=C3=A9dric Le Goater > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 7/9] pnv/xive2: Set Translation = Table for the NVC port=20 > > space > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 + Reviewed-by: C=C3=A9dric Le Goater > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 + Reviewed-by: C=C3=A9dric Le Goater > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 8/9] pnv/xive2: Fail VST entry a= ddress computation if=20 > > table has no VSD > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 + Reviewed-by: C=C3=A9dric Le Goater > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 + Reviewed-by: C=C3=A9dric Le Goater > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 [PATCH v2 9/9] pnv/xive2: Move xive2_nvp_p= ic_print_info() to=20 > > xive2.c > > =C2=A0=C2=A0=C2=A0 --- > > =C2=A0=C2=A0=C2=A0 =E2=9C=93 Signed: DKIM/ibm.com (From: kowal@linux.vn= et.ibm.com) > > > Thank you for the suggestion Cedric.=C2=A0 I can get `b4 am` to run but t= he=20 > attestation (signature checking?) fails.=C2=A0 In the future I will post = the=20 > following, along with revision comments in the cover letter.=C2=A0 Follow= ing=20 Hey Mike, It's enough just that those 'Reviewed-by' lines are added to your individual commit changelogs before you re-send. No need to send the b4 output. Thanks, Nick