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Thu, 15 May 2025 17:15:30 -0700 (PDT) Received: from localhost ([118.209.229.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b26eb0a9893sm473842a12.72.2025.05.15.17.15.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 May 2025 17:15:30 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Fri, 16 May 2025 10:15:25 +1000 Message-Id: Cc: , =?utf-8?q?Fr=C3=A9d=C3=A9ric_Barrat?= , "Glenn Miles" , "Michael Kowal" , "Caleb Schlossin" Subject: Re: [PATCH 10/50] ppc/xive2: Fix treatment of PIPR in CPPR update From: "Nicholas Piggin" To: "Nicholas Piggin" , X-Mailer: aerc 0.19.0 References: <20250512031100.439842-1-npiggin@gmail.com> <20250512031100.439842-11-npiggin@gmail.com> In-Reply-To: <20250512031100.439842-11-npiggin@gmail.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=npiggin@gmail.com; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon May 12, 2025 at 1:10 PM AEST, Nicholas Piggin wrote: > From: Glenn Miles > > According to the XIVE spec, updating the CPPR should also update the > PIPR. The final value of the PIPR depends on other factors, but it > should never be set to a value that is above the CPPR. > > Also added support for redistributing an active group interrupt when it > is precluded as a result of changing the CPPR value. > > Signed-off-by: Glenn Miles The second paragraph in there I believe was my fault when splitting the patch into this one and the previous. I will remove the second paragraph from this changelog and with that, Reviewed-by: Nicholas Piggin > --- > hw/intc/xive2.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c > index 2b4d0f51be..1971c05fa1 100644 > --- a/hw/intc/xive2.c > +++ b/hw/intc/xive2.c > @@ -995,7 +995,9 @@ static void xive2_tctx_set_cppr(XiveTCTX *tctx, uint8= _t ring, uint8_t cppr) > } > } > } > - regs[TM_PIPR] =3D pipr_min; > + > + /* PIPR should not be set to a value greater than CPPR */ > + regs[TM_PIPR] =3D (pipr_min > cppr) ? cppr : pipr_min; > =20 > rc =3D xive2_tctx_get_nvp_indexes(tctx, ring_min, &nvp_blk, &nvp_idx= ); > if (rc) {